IDT77V400

The  IDT77V400  ATM  Cell  Based  Switching  Memory  provides  the logic  and  memory  necessary  to  perform  high-speed  buffering  and switching operations on ATM cell data. A single IDT77V400 provides a cost effective switching element to implement an 8 x 8 155Mbps switch with  1.2Gbps  total  switching  bandwidth.  The  user  configurable  data ports provide an aggregate bandwidth of 1.2Gbps for both receive and transmit functions, and the cell lengths are user programmable to up to 56 bytes.

The memory provides storage for 8192 ATM cells, each of which can be as large as 56-bytes in length. The main cell memory is implemented as a Buffer Memory array, and an on-chip cell address counter keeps track of cell refresh requirements. There are also sixteen double-buff- ered  Serial Access Memories  (SAM);  eight  for  receiving  and  eight for transmitting the ATM cells.

The  input  data  ports  and  output  data  ports  are  configurable  from eight  ports  of  4-bits  at  155Mbps  each  up  to  one  32-bit  wide  port  at 1.2Gbps. The sixteen data ports are asynchronous with respect to each other,  and  each  port  provides  an  independent  data  clock  and  cell framing signal for start of cell indication. The SAMs are double-buffered for each input and each output port to allow one cell to be transferred to or from the internal memory while that data port continues to receive or transmit a second cell. The cell framing and data clock signals imple- ment a simple handshaking and synchronization protocol which allows multiple Switching Memories to be connected to construct larger switch arrays without requiring additional hardware.