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MFG:IOR  Package Cooled:DIP  

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Part Number: IR2110

 

MFG: IOR

Package Cooled: DIP

 

Description: The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and...


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IR2110 General Description


The IR2110/IR2113 are high voltage, high speed power MOSFET and IGBT drivers with independent high and low side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. Logic inputs are compatible with standard CMOS or LSTTL output, down to 3.3V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross-conduction. Propagation delays are matched to simplify use in high frequency applications. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high side configuration which operates up to 500 or 600 volts.

IR2110 Maximum Ratings

Symbol Definition Min. Max. Units
VB High side floating supply voltage (IR2110) -0.3 525 V
(IR2113) -0.3 625
VS High side floating supply offset voltage VB - 25 VB + 0.3
VHO High side floating output voltage VS - 0.3 VB + 0.3
VCC Low side fixed supply voltage -0.3 25
VLO Low side output voltage -0.3 VCC + 0.3
VDD Logic supply voltage -0.3 VSS + 25
VSS Logic supply offset voltage VCC - 25 VCC + 0.3
VIN Logic input voltage (HIN, LIN & SD) VSS - 0.3 VDD + 0.3
dVs/dt Allowable offset supply voltage transient (figure 2) - 50 V/ns
PD Package power dissipation @ TA +25 (14 lead DIP) - 1.6 W
(16 lead SOIC) - 1.25
RTHJA Thermal resistance, junction to ambient (14 lead DIP) - 75 /W
(16 lead SOIC) - 100
TJ Junction temperature - 150
TS Storage temperature   150
TL Lead temperature (soldering, 10 seconds) - 300

IR2110 Features

• Floating channel designed for bootstrap operation Fully operational to +500V or +600V Tolerant to negative transient voltage dV/dt immune
• Gate drive supply range from 10 to 20V
• Undervoltage lockout for both channels
• 3.3V logic compatible Separate logic supply range from 3.3V to 20V Logic and power ground ±5V offset
• CMOS Schmitt-triggered inputs with pull-down
• Cycle by cycle edge-triggered shutdown logic
• Matched propagation delay for both channels
• Outputs in phase with inputs

IR2110 Connection Diagram

IR2110  Connection Diagram

IR2110 datasheet

IR2110
PDF/DataSheet Download

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