IS61C12816

Features: • High-speed access time: 12, 15, and 20 ns• CMOS low power operation - 450 mW (typical) operating - 250 W (typical) standby• TTL compatible interface levels• Single 5V ± 10% power supply• Fully static operation: no clock or refresh required• Three sta...

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IS61C12816 Picture
SeekIC No. : 004379121 Detail

IS61C12816: Features: • High-speed access time: 12, 15, and 20 ns• CMOS low power operation - 450 mW (typical) operating - 250 W (typical) standby• TTL compatible interface levels• Singl...

floor Price/Ceiling Price

Part Number:
IS61C12816
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

• High-speed access time: 12, 15, and 20 ns
• CMOS low power operation
   - 450 mW (typical) operating
   - 250 W (typical) standby
• TTL compatible interface levels
• Single 5V ± 10% power supply
• Fully static operation: no clock or refresh required
• Three state outputs
• Industrial temperature available
• Available in 44-pin SOJ package and 44-pin TSOP(II)



Pinout

  Connection Diagram


Specifications

Symbol Parameter
Value
Unit
VTERM Terminal Voltage with Respect to GND
0.5 to+7.0
V
TSTG Storage Temperature
65 to +150
PT Power Dissipation
1.5
W
IOUT DC Output Current (LOW)
20
mA
Note:
1. Stress greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.



Description

The ISSI IS61C12816 is a high-speed, 2,097,152-bit static RAM organized as 131,072 words by 16 bits. It is fabricated using ISSI's high-performance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 12 ns with low power consumption.

When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory.A data byte allows Upper Byte (UB) and Lower Byte (LB) access.

The IS61C12816 is packaged in the JEDEC standard 44-pin 400-mil SOJ and 44-pin TSOP(II).




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