IS61LV12824

The ISSI IS61LV12824 is a high-speed, static RAM organized as 131,072 words by 24 bits. It is fabricated using ISSI's highperformance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields access times as fast as 8 ns with low power consumption.

When CE1, CE2 are HIGH and CE2 is LOW (deselected), the device assumes a standby mode at which the power dissipation can be reduced down with CMOS input levels.

Easy memory expansion is provided by using Chip Enable and Output Enable inputs, CE1, CE2, CE2 and OE. The active LOW Write Enable (WE) controls both writing and reading of the memory.

The IS61LV12824 is packaged in the JEDEC standard 119-pin PBGA and 100-pin TQFP