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Part Number: K4H560838E-LB3

 

 

 

 

 

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K4H560838E-LB3 Maximum Ratings

Parameter Symbol Value Unit
Voltage on any pin relative to VSS VIN, VOUT -0.5 ~ 3.6 V
Voltage on VDD & VDDQ supply relative to VSS VDD, VDDQ -1.0 ~ 3.6 V
Storage temperature TSTG -55 ~ +150
Power dissipation PD 1.5 W
Short circuit current IOS 50 mA

K4H560838E-LB3 Features

• Double-data-rate architecture; two data transfers per clock cycle
• Bidirectional data strobe(DQS)
• Four banks operation
• Differential clock inputs(CK and CK)
• DLL aligns DQ and DQS transition with CK transition
• MRS cycle with address key programs
   -. Read latency 2, 2.5 (clock)
   -. Burst length (2, 4, 8)
   -. Burst type (sequential & interleave)
• All inputs except data & DM are sampled at the positive going edge of the system clock(CK)
• Data I/O transactions on both edges of data strobe
• Edge aligned data output, center aligned data input
• DM for write masking only (x4, x8)
• Auto & Self refresh
• 7.8us refresh interval(8K/64ms refresh)
• Maximum burst refresh cycle : 8
• 66pin TSOP II package

K4H560838E-LB3 Connection Diagram

K4H560838E-LB3  Connection Diagram

K4H560838E-LB3 datasheet

K4H1G0438A-TCA0
PDF/DataSheet Download

  • Datasheet: K4H1G0438A-TCA0
  • File Size: 685336 KB
  • Manufacturer: SAMSUNG [Samsung semiconductor]
  • Click here to Download

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