Purchase K6R1004C1C-P, In-stock K6R1004C1C-P From SeekIC.
Part Number: K6R1004C1C-P
Description: The K6R1004C1C is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by...
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K6R1004C1C-P
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DataSheet
General Description
K6R1004C1C-P General Description
The K6R1004C1C is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1C uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNG 's advanced CMOS process and designed for highspeed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R1004C1C is packaged in a 400 mil 32-pin plastic SOJ.
K6R1004C1C-P Maximum Ratings
| Item | Symbol | Ratings | Unit | |
| Voltage on any pin relative to Vss | VIN,VOUT | -0.5 to Vcc+0.5V | V | |
| Voltage on Vcc supply relative to Vss | VCC | -0.5 to 7.0 | V | |
| Power Dissipation | PD | 1 | W | |
| Storage temperature | TSTG | -65 to 150 | °C | |
| Operating Temperature | Commercial | TA | 0 to 70 | °C |
| Industrial | TA | -40 to 85 | °C | |
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
K6R1004C1C-P Features
• Fast Access Time 10,12,15,20ns(Max.)
• Low Power Dissipation Standby (TTL) : 30mA(Max.) CMOS) : 5mA(Max.) 0.5mA(Max.) L-Ver. only Operating K6R1004C1C-10 : 75mA(Max.)
K6R1004C1C-12 : 70mA(Max.)
K6R1004C1C-15 : 68mA(Max.)
K6R1004C1C-20 : 65mA(Max.)
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention; L-ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration :
• Low Power Dissipation Standby (TTL) : 30mA(Max.) CMOS) : 5mA(Max.) 0.5mA(Max.) L-Ver. only Operating K6R1004C1C-10 : 75mA(Max.)
K6R1004C1C-12 : 70mA(Max.)
K6R1004C1C-15 : 68mA(Max.)
K6R1004C1C-20 : 65mA(Max.)
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention; L-ver. only
• Center Power/Ground Pin Configuration
• Standard Pin Configuration :
K6R1004C1C-P Connection Diagram
K6R1004C1C-P
PDF/DataSheet Download
- Datasheet: K6R1004C1C-P
- File Size: 140468 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
- ·K6R1004C1C
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-C
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-C10
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-C12
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-C15
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-C20
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-I
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
- ·K6R1004C1C-I10
- SAMSUNG [Samsung semiconductor]
- 256Kx4 Bit (with OE) High-Speed CMOS Static RAM(5.0V Operating).
- 140468 KB
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The K6R1004C1C-L is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1C-L uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004C1C-I
The K6R1004C1C-I is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1C-I uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004C1C-C
The K6R1004C1C-C is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1C-C uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
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