Purchase K6R1004V1D, In-stock K6R1004V1D From SeekIC.
Part Number: K6R1004V1D
Description: The K6R1004V1D is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by...
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K6R1004V1D
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DataSheet
General Description
K6R1004V1D General Description
The K6R1004V1D is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The device is fabricated using SAMSUNGs advanced CMOS process and designed for high-speed circuit technology. It is particularly well suited for use in high-density high-speed system applications. The K6R1004V1D is packaged in a 400 mil 32-pin plastic SOJ.
K6R1004V1D Maximum Ratings
|
Parameter |
Symbol |
Rating |
Unit | |
| Voltage on Any Pin Relative to VSS |
VIN, VOUT |
-0.5 to 4.6 |
V | |
| Voltage on VCC Supply Relative to VSS |
VCC |
-0.5 to 4.6 |
V | |
| Power Dissipation |
Pd |
1 |
W | |
| Storage Temperature |
TSTG |
-65 to 150 |
||
| Operating Temperature |
Commercial |
TA |
0 to 70 |
|
|
Industrial |
TA |
-40 to 85 |
||
* Stresses greater than those listed under "Absolute Maximum Ratings" may cause permanent damage to the
device. This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operating sections of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect reliability.
K6R1004V1D Features
• Fast Access Time 8,10ns(Max.)
• Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
Operating K6R1004V1D-08: 80mA(Max.)
K6R1004V1D-10: 65mA(Max.)
• Single 3.3±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration :
K6R1004V1D-J : 32-SOJ-400
K6R1004V1D-K : 32-SOJ-400 (Lead-Free)
• Operating in Commercial and Industrial Temperature range.
• Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 5mA(Max.)
Operating K6R1004V1D-08: 80mA(Max.)
K6R1004V1D-10: 65mA(Max.)
• Single 3.3±0.3V Power Supply
• TTL Compatible Inputs and Outputs
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• Center Power/Ground Pin Configuration
• Standard Pin Configuration :
K6R1004V1D-J : 32-SOJ-400
K6R1004V1D-K : 32-SOJ-400 (Lead-Free)
• Operating in Commercial and Industrial Temperature range.
K6R1004V1D Connection Diagram
K6R1004V1D
PDF/DataSheet Download
- Datasheet: K6R1004V1D
- File Size: 196794 KB
- Manufacturer: SAMSUNG [Samsung semiconductor]
- Click here to Download
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K6R1004V1D Relative Products
K6R1004V1C-P
The K6R1004V1C-P is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1C-P uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004V1C-L
The K6R1004V1C-L is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1C-L uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004V1C-I
The K6R1004V1C-I is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1C-I uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004V1C-C
The K6R1004V1C-C is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004V1C-C uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
K6R1004C1D
The K6R1004C1D is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1D uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. The ...
K6R1004C1C-P
The K6R1004C1C-P is a 1,048,576-bit high-speed Static Random Access Memory organized as 262,144 words by 4 bits. The K6R1004C1C-P uses 4 common input and output lines and has an output enable pin which operates faster than address access time at read cycle. ...
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