Features: ·Architecture
• Design Technology: 0.12um
• Voltage Supply
- 1.8V device(KFG1216Q2M) : 1.7V~1.95V
- 2.65V device(KFG1216D2M) : 2.4V~2.9V
- 3.3V device(KFG1216U2M) : 2.7V~3.6V
• Organization
- Host Interface:16bit
• Internal BufferRAM(5K Bytes)
- 1KB for BootRAM, 4KB for DataRAM
• NAND Array
- Page Size : (2K+64)bytes
- Block Size : (128K+4K)bytes
♦ Architecture
• Host Interface type
- Synchronous Burst Read
: Clock Frequency: up to 54MHz
: Linear Burst - 4, 8, 16, 32 words with wrap-around
: Continuous Sequential Burst(1K words)
- Asynchronous Random Read
: Access time of 76ns
- Asynchronous Random Write
• Programmable Read latency
• Multiple Sector Read
- Read multiple sectors by Sector Count Register(up to 4 sectors)
• Reset Mode
- Cold Reset / Warm Reset / Hot Reset / NAND Flash Reset
• Power dissipation (typical values)
- Standby current : 10uA@1.8V, 20uA@2.65V/3.3V for single, 20uA@1.8V, 40uA@2.65V/3.3V for DDP
- Synchronous Burst Read current(54MHz) : 12mA@1.8V device, 20mA@2.65V/3.3V device
- Load current : 20mA@1.8V device, 25mA@2.65V/3.3V device
- Program current: 20mA@1.8V device, 25mA@2.65V/3.3V device
- Erase current: 15mA@1.8V device, 20mA@2.65V/3.3V device
• Reliable CMOS Floating-Gate Technology
- Endurance : 100K Program/Erase Cycles
- Data Retention : 10 Years
·Hardware Features
• Voltage detector generating internal reset signal from Vcc
• Hardware reset input (RP)
• Data Protection
- Write Protection for BootRAM
- Write Protection mode for NAND Flash Array
- Write protection during power-up
- Write protection during power-down
• User-controlled One Time Programmable(OTP) area
• Internal 2bit EDC / 1bit ECC
• Internal Bootloader supports Booting Solution in system
·Software Features
• Handshaking Feature
- INT pin: Indicates Ready / Busy of OneNAND
- Polling method: Provides a software method of detecting the Ready / Busy status of OneNAND
• Detailed chip information by ID register
·Packaging
• Package
- 63ball, 9.5mm x 12mm x max 1.0mmt , 0.8mm ball pitch FBGA
Specifications
|
Parameter
|
SymbolL |
Rating |
UNIT |
| Voltage on any pin relative to VSS |
Vcc |
Vcc |
KFG1216Q2M
KFH1G16Q2M |
KFG1216D2M
KFH1G16D2M |
KFG1216U2M
KFH1G16U2M |
V |
|
All Pins |
VIN |
-0.5 to + 2.45 |
-0.6 to + 4.6 |
-0.6 to + 4.6 |
|
-0.5 to + 2.45 |
-0.6 to + 4.6 |
-0.6 to + 4.6 |
| Temperature Under Bias |
Extended |
Tbias |
-30 to +125 |
-30 to +125 |
-30 to +125 |
|
| ndustrial |
- |
- |
-40 to +125 |
| Storage Temperature |
Tstg |
-65 to +150 |
-65 to +150 |
-65 to +150 |
|
| Short Circuit Output Current |
IOS |
5 |
5 |
5 |
mA |
| Recommended Operating Temperature
|
TA (Extended Temp.) |
-30 to + 85 |
-30 to + 85 |
- |
|
|
TA (Industrial Temp.) |
- |
- |
-40 to + 85 |
5
DescriptionOneNAND KFG1216U2M is a single-die chip with standard NOR Flash interface using NAND Flash Array. This KFG1216U2M is comprised of logic and NAND Flash Array and 5KB internal BufferRAM. 1KB BootRAM is used for reserving bootcode, and 4KB DataRAM is used or buffering data. The operating clock frequency is up to 54MHz. This device is X16 interface with Host, and has the speed of ~76ns random access time. Actually, KFG1216U2M is accessible with minimum 4clock latency(host-driven clock for synchronous read), but this device adopts the appropriate wait cycles by programmable read latency. OneNAND provid es the multiple sector read operation by assigning the number of sectors to be read in the sector counter register. The KFG1216U2M includes one block sized OTP(One Time Programmable), which can be used to increase system security or to provide identification capabilities
KFG1216U2M Data Sheet
