KFG1216x2A-xxB5

Device Architecture
• Design Technology:......90nm
• Supply Voltage:......1.8V (1.7V ~ 1.95V), 2.65V (2.4 ~ 2.9V), 3.3V (2.7 ~3.6V) 
• Host Interface:......16 bit
• 5KB Internal BufferRAM:......1KB BootRAM, 4KB DataRAM
• SLC NAND Array:......2K+64)B Page Size, (128K+4K)B Block Size
Device Performance
• Host Interface Type:......Synchronous Burst Read
..................- Up to 54MHz clock frequency
..................- Linear Burst 4-, 8-, 16, 32-words with wrap around
..................- Continuous 1K word Sequential Burst
..................Asynchronous Random Read
..................- 76ns access time
..................Asynchronous Random Write
• Programmable Burst Read Latency......Latency 3(up to 40MHz), 4, 5, 6, and 7
• Multiple Sector Read:......Up to 4 sectors using Sector Count Register
• Multiple Reset Modes:......Cold/Warm/Hot/NAND Flash Resets
• Multi Block Erase:......up to 64 blocks
• Low Power Dissipation:......Typical Power,
..................- Standby current : 10uA@1.8Vdevice,
..................35uA@2.65V/3.3V device
..................- Synchronous Burst Read current : 12mA@1.8Vdevice
..................22mA@2.65V/3.3V device
..................- Load current : 30mA@all device
..................- Program current : 25mA@1.8v device
..................28mA@2.65V/3.3V device
..................- Erase current : 20mA@1.8V device
..................23mA@2.65V/3.3V device
..................- Multi Block Erase current : 20mA@1.8V device
..................23mA@2.65V/3.3V device
System Hardware
• Voltage detector generating internal reset signal from Vcc
• Hardware reset input (/RP)
• Data Protection Modes.....- Write Protection for BootRAM
..................- Write Protection for NAND Flash Array
..................- Write Protection during power-up
..................- Write Protection during power-down
• User-controlled One Time Programmable(OTP) area
• Internal 2bit EDC / 1bit ECC
• Internal Bootloader supports Booting Solution in system
• Handshaking Feature ......- INT pin indicates Ready / Busy
...................- Polling the interrupt register status bit
• Detailed chip information..... - by ID register
Packaging ..............63ball, 9.5mm x 12mm x max 1.0mmt , 0.8mm ball pitch FBGA

The OneNAND is an advanced generation, high-performance NAND-based Flash memory.

KFG1216x2A-xxB5 integrates on-chip a single-level-cell (SLC) NAND Flash Array memory with two independent data buffers, boot RAM  uffer, a page buffer for the Flash array, and a one-time-programmable block.

The combination of these memory areas enable high-speed pipelining of reads from host, BufferRAM, Page Buffer, and NAND Flash Array memory.

Clock speeds up to 54MHz with a x16 wide I/O yields a 68MByte/second bandwidth.

The OneNAND KFG1216x2A-xxB5 also includes a Boot RAM and boot loader. This enables the device to efficiently load boot code at device startup from the NAND Array without the need for off-chip boot device.

One block of the NAND Array KFG1216x2A-xxB5 is set aside as an OTP memory area. This area, available to the user, can be configured  nd locked with secured user information.

On-chip controller interfaces enable the device to operate in systems without NAND Host controllers.