KK74ACT139

Features: `TTL/NMOS Compatible Input Levels `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 4.5 to 5.5 V `Low Input Current: 1.0A; 0.1A @ 25 `Outputs Source/Sink 24 mA PinoutSpecifications Symbol Parameter Value Unit VCCVINVOUTIINIOUTICCPDTstgTL ...

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KK74ACT139 Picture
SeekIC No. : 004385751 Detail

KK74ACT139: Features: `TTL/NMOS Compatible Input Levels `Outputs Directly Interface to CMOS, NMOS, and TTL `Operating Voltage Range: 4.5 to 5.5 V `Low Input Current: 1.0A; 0.1A @ 25 `Outputs Source/Sink 24 mA P...

floor Price/Ceiling Price

Part Number:
KK74ACT139
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/26

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Product Details

Description



Features:

`TTL/NMOS Compatible Input Levels  
`Outputs Directly Interface to CMOS, NMOS, and TTL  
`Operating Voltage Range: 4.5 to 5.5 V  
`Low Input Current: 1.0A; 0.1A @ 25  
`Outputs Source/Sink 24 mA



Pinout

  Connection Diagram


Specifications

Symbol
Parameter
Value
Unit
VCC

VIN

VOUT

IIN

IOUT

ICC

PD

Tstg


TL
DC Supply Voltage (Referenced to GND)

DC Input Voltage (Referenced to GND)

DC Output Voltage (Referenced to GND)

DC Input Current, per Pin

DC Output Sink/Source Current, per Pin

DC Supply Current, VCC and GND Pins

Power Dissipation in Still Air, Plastic DIP+
SOIC Package+

Storage Temperature

Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
-0.5 to +7.0

-0.5 to VCC +0.5

-0.5 to VCC +0.5

±20

±50

±50

750
500

-65 to +150

260
V

V

V

mA

mA

mA

mW






*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/ from 65° to 125
SOIC Package: : - 7 mW/ from 65° to 125



Description

The  KK74ACT139 is identical in pinout to the LS/ALS139,HC/HCT139. The KK74ACT139 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs.

This  device  consists of two independent 1-of-4 decoders, each of which  decodes  a  two-bit Address to one-of-four active-low outputs. Active-low  Selects are provided to facilitate the demultiplexing and cascading functions. The demultiplexing function is accomplished  by using the Address inputs to select the desired device output, and utilizing the Select as a data input.




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