Purchase LP62P16128C, In-stock LP62P16128C From SeekIC.
Part Number: LP62P16128C
Description: ·The LP62P16128C-T is a low operating current 2,097,152-bit static random access memory organ...
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LP62P16128C
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DataSheet
General Description
LP62P16128C General Description
·The LP62P16128C-T is a low operating current 2,097,152-bit static random access memory organized as 131,072 words by 16 bits and operates on low power voltage from 2.3V to 2.7V. It is built using AMIC's high performance CMOS process.
·Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.
·The chip enable input is provided for POWER-DOWN, device enable. Two byte enable inputs and an output enable input are included for easy interfacing.
Data retention is guaranteed at a power supply voltage as low as 1.2V.
LP62P16128C Maximum Ratings
VCC to GND ............................................... -0.5V to +4.6V
IN, IN/OUT Volt to GND .................... -0.5V to VCC + 0.5V
Operating Temperature, Topr ....................-25 to +85
Storage Temperature, Tstg......................-55 to +125
Power Dissipation, PT ............................................... 0.7W
IN, IN/OUT Volt to GND .................... -0.5V to VCC + 0.5V
Operating Temperature, Topr ....................-25 to +85
Storage Temperature, Tstg......................-55 to +125
Power Dissipation, PT ............................................... 0.7W
LP62P16128C Features
·Operating voltage: 2.3V to 2.7V
· Access times: 120 ns (max.)
· Current: Very low power version: Operating: 20mA (max.) Standby: 100mA (max.)
· Full static operation, no clock or refreshing required
· All inputs and outputs are directly TTL-compatible
· Common I/O using three-state output
· Data retention voltage: 1.2V (min.)
· Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages
· Access times: 120 ns (max.)
· Current: Very low power version: Operating: 20mA (max.) Standby: 100mA (max.)
· Full static operation, no clock or refreshing required
· All inputs and outputs are directly TTL-compatible
· Common I/O using three-state output
· Data retention voltage: 1.2V (min.)
· Available in 44-pin TSOP and 48-ball CSP (6 x 8 mm) packages
LP62P16128C Connection Diagram
LP62P16128C-T
PDF/DataSheet Download
- Datasheet: LP62P16128C-T
- File Size: 167485 KB
- Manufacturer: AMICC [AMIC Technology]
- Click here to Download
- ·LP61L1008
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 146316 KB
- ·LP61L1008A
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 121194 KB
- ·LP61L1008AS-10
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 121194 KB
- ·LP61L1008AS-12
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 121194 KB
- ·LP61L1008AS-8
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 121194 KB
- ·LP61L1008S-12
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 146316 KB
- ·LP61L1008S-15
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 146316 KB
- ·LP61L1008X-12
- AMICC [AMIC Technology]
- 128K X 8 BIT 3.3V HIGH SPEED CENTER POWER CMOS SRAM
- 146316 KB
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