M2V56S40TP General Description
M2V56S40TP Maximum Ratings
M2V56S40TP Features
· Single 3.3v±0.3V power supply
· Max. Clock frequency 100MHz(-7/-8), 133MHz (-6)
· Fully Synchronous operation referenced to clock rising edge
· Single Data Rate
· 4 bank operation controlled by BA0, BA1 (Bank Address)
· /CAS latency- 2/3 (programmable)
· Burst length- 1/2/4/8/full page (programmable)
· Burst type- sequential / interleave (programmable)
· Random column access
· Auto precharge / All bank precharge controlled by A10
· 8192 refresh cycles /64ms (4 banks concurrent refresh)
· Auto refresh and Self refresh
· Row address A0-12 / Column address A0-9,11(x4)/ A0-9(x8)/ A0-8(x16)
· LVTTL Interface
· 400-mil, 54-pin Thin Small Outline Package (TSOP II) with 0.8mm lead pitch
M2V56S40TP Connection Diagram
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