M3-2200-33

The M3-2200-33 F/2F decoder integrated circuit is designed for use in magnetic strip card reader system.

The M3-2200-33 F/2F read/decoder IC will recover clock and data signals from an F/2F data stream generated from a magnetic head. M3-2200-33 will function for data rates from 200 to 15,000 bits per second. Acquisition and tracking of the data within this range is automatically.

M3-2200-33 is consisted by two major blocks at each channel:
Amplify block- This block amplifies and filters the signal read from the magnetic reader head, rejects common mode noise and detects signal peaks. M3-2200-33 also includes protection circuit to protect the component. And latches onto the data rate and performs the recovery of individual bits from the F/2F data stream.

Control block- The enable and disable counters M3-2200-33 provide initialization for the recovery block. These counters initialize both bit  ecovery and the signal conditioning and detection block.