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Description: With valid VCC applied, the M48Z512A/Y/V operates as a conventional BYTEWIDETM s...


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M48Z512AV General Description


With valid VCC applied, the M48Z512A/Y/V operates as a conventional BYTEWIDETM static RAM. Should the supply voltage decay, the RAM will automatically power-fail deselect, write protecting itself tWP after VCC falls below VPFD. All outputs become high impedance, and all inputs are treated as "don't care."

If power fail detection occurs during a valid access, the memory cycle continues to completion. If the memory cycle fails to terminate within the time tWP, write protection takes place. When VCC drops below VSO, the control circuit switches power to the internal energy source which preserves data.

The internal coin cell will maintain data in the M48Z512A/Y/V after the initial application of VCC for an accumulated period of at least 10 years when VCC is less than VSO. As system power returns and VCC rises above VSO, the battery is disconnected, and the power supply is switched to external VCC. Write protection continues for tER after VCC reaches VPFD to allow for processor stabilization. After tER, normal RAM operation can resume.

For more information on Battery Storage Life refer to the Application Note AN1012.

M48Z512AV Maximum Ratings

Stressing the device above the rating listed in the "Absolute Maximum Ratings" table may cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Refer also to the STMicroelectronics SURE Program and other relevant quality documents.

Symbol
Parameter
Value
Unit
TA
Ambient Operating Temperature
0 to 70
°C
TSTG
Storage Temperature (VCC Off, Oscillator Off)
40 to 85
°C
TBIAS
Temperature Under Bias
40 to 70
°C
TSLD
(1)
Lead Solder Temperature for 10 seconds
260
°C
VIO
Input or Output Voltages
0.3 to 7
V
VCC
Supply Voltage
M48Z512A/512AY
0.3 to 7.0
V
M48Z512AV
0.3 to 4.6
V
IO
Output Current
20
mA
PD
Power Dissipation
1
w

M48Z512AV Features

` INTEGRATED, ULTRA LOW POWER SRAM, POWER-FAIL CONTROL CIRCUIT, and BATTERY
` CONVENTIONAL SRAM OPERATION; UNLIMITED WRITE CYCLES
`10 YEARS OF DATA RETENTION IN THE ABSENCE OF POWER
`AUTOMATIC POWER-FAIL CHIP DESELECT and WRITE PROTECTION
`TWO WRITE PROTECT VOLTAGES: (VPFD = Power-fail Deselect Voltage)  M48Z512A: VCC = 4.75 to 5.5V 4.5V     VPFD     4.75V M48Z512AY: VCC = 4.5 to 5.5V 4.2V     VPFD    4.5V M48Z512AV: VCC = 3.0 to 3.6V 2.8V 3 VPFD 3 3.0V
` BATTERY INTERNALLY ISOLATED UNTIL POWER IS APPLIED
` PIN and FUNCTION COMPATIBLE WITH JEDEC STANDARD 512K x 8 SRAMs
` SURFACE MOUNT CHIP SET PACKAGING (Figure 2) INCLUDES A 28-PIN SOIC and A 32- LEAD TSOP (SNAPHAT® Top to be ordered separately)
` SOIC PACKAGE PROVIDES DIRECT CONNECTION FOR A SNAPHATTOP WHICH CONTAINS THE BATTERY
` SNAPHAT HOUSING (BATTERY) IS REPLACEABLE

M48Z512AV datasheet

M48Z512AV
PDF/DataSheet Download

  • Datasheet: M48Z512AV
  • File Size: 258366 KB
  • Manufacturer: STMICROELECTRONICS [STMicroelectronics]
  • Click here to Download

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