M67202A

Features:

First-in first-out dual port memory
512 * 9 organisation (M 67201A)
1024 * 9 organisation (M 67202A)
Fast access time
  20*, 25, 35, 45, 55 ns, commercial, industrial and automotive
  20*, 25, 30, 40, 50 ns, military
Wide temperature range : 55°C to + 125°C
67201AL/202AL low power 67201AV/202AV very low power
Fully expandable by word width or depth
Asynchronous read/write operations
Empty, full and half flags in single device mode
Retransmit capability
Bi-directional applications
Battery back-up operation : 2 V data retention
TTL compatible
Single 5 V ± 10 % Power Supply (1)
High performance SCMOS technology

  * Preview. Please Consult Sales.
  (1) 3.3 V versions are also available. Please consult sales.


Pinout




Specifications

Supply voltage (VCC GND) . . . . . . . . . . . . . . . . . . 0.3 V to 7.0 V
Input or Output voltage applied : . . . . . . . . . . . . . . (GND 0.3 V) to (Vcc + 0.3 V)
Storage temperature : . . . . . . . . . . . . . . . . . . . . . . 65 to + 150

OPERATING RANGE	OPERATING SUPPLY VOLTAGE	OPERATING TEMPERATURE
Military	Vcc = 5 V ± 10 %	55 to + 125
Industrial	Vcc = 5 V ± 10 %	40 to + 85
Commercial	Vcc = 5 V ± 10 %	0 to + 70
Automotive	Vcc = 5 V ± 10 %	40 to + 125

Description

The M67201A/202A implement a first-in first-out lgorithm, featuring asynchronous read/write operations. he FULL and EMPTY flags prevent data overflow and nderflow. The Expansion logic allows unlimited xpansion in word size and depth with no timing penalties. Twin address pointers automatically generate internal read and write addresses, and no external address information are required for the TEMIC FIFOs. Address pointers of M67201A/202A  are automatically incremented with the write pin and read pin. The 9 bits wide data are used in data communications applications where a parity bit for error checking is necessary. The Retransmit pin reset the Read pointer to zero without affecting the write pointer. This is very useful for retransmitting data when an error is detected in the system.

Using an array of eigh transistors (8 T) memory cell and fabricated with the state of the art 1.0 mm lithography named SCMOS, the M 67201A/202A combine an extremely low standby supply current (typ = 1.0 A) with a fast access time at 25 ns over the full temperature range. All versions offer battery backup data retention capability with a typical power consumption at less than 5 W.

For military/space applications of M67201A/202A  that demand superior levels of performance and reliability the M 67201A/202A is processed according to the methods of the latest revision of the MIL STD 883 (class B or S) and/or ESA SCC 9000.