M6MGD137W34DWG

The M6MGD137W34DWG is a Stacked Chip Scale Package (S-CSP) that contents 128M-bit Flash memory and 32M-bit Mobile RAM in a 72-pin Stacked CSP for lead free use.

128M-bit Flash memory of M6MGD137W34DWG is a 8,388,608 words, single power supply and high performance non-volatile memory fabricated by CMOS technology for the peripheral circuit and DINOR IV (Divided bit-line NOR IV) architecture for the memory cell. All memory blocks are locked and can not be programmed or erased, when F-WP# is Low. Using Software Lock Release function, program or erase operation can be executed.

32M-bit Mobile RAM is a 2,097,152 words high density RAM fabricated by CMOS technology for the peripheral circuit and DRAM cell for the memory array. The interface is compatible to an asynchronous SRAM.

The cells are automatically refreshed and the refresh control is not required for system. The device also has the partial blockrefresh scheme and the power down mode by writing the command.

The M6MGD137W34DWG is suitable for a high performance cellular phone and a mobile PC that are required to be small mounting area, weight and small power dissipation.