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Part Number: MB40C318
Description: MB40C318 is a high-speed A/D converter using a fast CMOS technology.
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MB40C318
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DataSheet
General Description
MB40C318 General Description
MB40C318 is a high-speed A/D converter using a fast CMOS technology.
MB40C318 Maximum Ratings
| Parameter | Symbol | Rating | Unit | |
| Min. | Max. | |||
| Power supply voltage | AVDD, DVDD | 0.3 | +4.0 | V |
| DVDDI | 0.3 | +7.0 | ||
| Input/output voltage | VINA, VRT, VRB, VREFT, VREFB, VR1, VR2, VR3, CE, CKSEL |
0.3 | AVDD+0.3*1 | V |
| DA0 to DA7, DB0 to DB7, CLKOA, CLKOB, CLKA, CLKB, DSEL, OE, RESET |
0.3 | DVDD+0.3*2 | V | |
| CLKEP, CLKEN | 0.3 | DVDDI+0.3*2 | V | |
| Storage temperature | TSTG | 55 | +125 | °C |
*2: Do not exceed +7.0 V.
WARNING: Semiconductor devices can be permanently damaged by application of stress (voltage, current,
temperature, etc.) in excess of absolute maximum ratings. Do not exceed these ratings.
MB40C318 Features
• Resolution : 8 bit
• Linearity error : ±0.40% (standard)
• Maximum conversion rate : 140 MSPS (minimum)
• Power supply voltage : 3.3 V/5 V (standard: PECL clock input)
3.3 V (standard: PECL other than clock input)
• Clock input voltage range : PECL level (140 MHz max differential input CLKEP, CLKEN)
CMOS level (70 MHz max two-phase input CLKA, CLKB)
• Digital input voltage range CMOS level
• Digital output voltage range : CMOS level compatible
• Analog input voltage range : 0 to 3.0 V (2 Vp-p)
• Analog input capacitance : 22 pF (standard)
• Power dissipation : 300 mW (standard)
• Additional features : Reference voltage generator circuit: VREFT = 3.0 V, VREFB = 1.0 V
High impedance output, power down function
1:2 demultiplex output enable (RESET action enable)
1/2 deviding clock output
Cross sampling at 70 MHz (two-phase CLK) enable (CLKA, CLKB)
• Package : LQFP48 (7 mm ×7 mm, lead pitch 0.5 mm)
• Linearity error : ±0.40% (standard)
• Maximum conversion rate : 140 MSPS (minimum)
• Power supply voltage : 3.3 V/5 V (standard: PECL clock input)
3.3 V (standard: PECL other than clock input)
• Clock input voltage range : PECL level (140 MHz max differential input CLKEP, CLKEN)
CMOS level (70 MHz max two-phase input CLKA, CLKB)
• Digital input voltage range CMOS level
• Digital output voltage range : CMOS level compatible
• Analog input voltage range : 0 to 3.0 V (2 Vp-p)
• Analog input capacitance : 22 pF (standard)
• Power dissipation : 300 mW (standard)
• Additional features : Reference voltage generator circuit: VREFT = 3.0 V, VREFB = 1.0 V
High impedance output, power down function
1:2 demultiplex output enable (RESET action enable)
1/2 deviding clock output
Cross sampling at 70 MHz (two-phase CLK) enable (CLKA, CLKB)
• Package : LQFP48 (7 mm ×7 mm, lead pitch 0.5 mm)
MB40C318 Connection Diagram
MB40C318
PDF/DataSheet Download
- Datasheet: MB40C318
- File Size: 177726 KB
- Manufacturer: FUJITSU [Fujitsu Media Devices Limited]
- Click here to Download
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