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Part Number: MC-458CB646
Description: The MC-458CB646EFB and MC-458CB646PFB are 8,388,608 words by 64 bits synchronous dynamic RAM module on which 4 pieces o...
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MC-458CB646
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General Description
MC-458CB646 General Description
The MC-458CB646EFB and MC-458CB646PFB are 8,388,608 words by 64 bits synchronous dynamic RAM module on which 4 pieces of 128M SDRAM: µPD45128163 are assembled.
This module provides high density and large quantities of memory in a small space without utilizing the surface mounting technology on the printed circuit board.
Decoupling capacitors are mounted on power supply line for noise reduction.
MC-458CB646 Maximum Ratings
| Parameter | Symbol | Condition | Rating | Unit |
| Voltage on power supply pin relative to GND | VCC | 0.5 to +4.6 | V | |
| Voltage on input pin relative to GND | VT | 0.5 to +4.6 | V | |
| Short circuit output current | IO | 50 | mA | |
| Power dissipation | PD | 4 | W | |
| Operating ambient temperature | TA | 0 to 70 | °C | |
| Storage temperature | Tstg | 55 to +125 | °C |
MC-458CB646 Features
• 8,388,608 words by 64 bits organization
• Clock frequency and access time from CLK
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and full page)
• Programmable wrap sequence (sequential / interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ± 10 % of series resistor
• Single 3.3 V ± 0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Unbuffered type
• Serial PD
• Clock frequency and access time from CLK
• Fully Synchronous Dynamic RAM, with all signals referenced to a positive clock edge
• Pulsed interface
• Possible to assert random column address in every cycle
• Quad internal banks controlled by BA0 and BA1 (Bank Select)
• Programmable burst-length (1, 2, 4, 8 and full page)
• Programmable wrap sequence (sequential / interleave)
• Programmable /CAS latency (2, 3)
• Automatic precharge and controlled precharge
• CBR (Auto) refresh and self refresh
• All DQs have 10 Ω ± 10 % of series resistor
• Single 3.3 V ± 0.3 V power supply
• LVTTL compatible
• 4,096 refresh cycles/64 ms
• Burst termination by Burst Stop command and Precharge command
• 168-pin dual in-line memory module (Pin pitch = 1.27 mm)
• Unbuffered type
• Serial PD
MC-458CB646 Connection Diagram
MC-458CB646
PDF/DataSheet Download
- Datasheet: MC-458CB646
- File Size: 203520 KB
- Manufacturer: NEC [NEC]
- Click here to Download
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