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Part Number: MC100EP17
MFG: 0
Package Cooled: 0
Description: The MC10/100EP17 is a 4-bit differential line receiver based on the EP16 device. The >3.0 GHz maximum frequ...
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MC100EP17
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DataSheet
General Description
MC100EP17 General Description
The MC10/100EP17 is a 4-bit differential line receiver based on the EP16 device. The >3.0 GHz maximum frequency provided by the high frequency outputs makes the device ideal buffering of very high speed oscillators.
The VBBpin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switchireference voltage.VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01
The design incorporates two stages of gain, internal to the device, making it an excellent choice for use in high bandwidth amplifier applications.Inputs of unused gates can be left open and will not affect the operation of the rest of the device. All VCC and VEE pins must be externally connected to power supply to guarantee proper operation.
The 100 Series contains temperature compensation.
MC100EP17 Maximum Ratings
|
Symbol |
|
|
|
|
|
|
VCC |
PECL Mode Power Supply |
|
|
|
V |
|
VEE |
|
|
|
-6 |
V |
|
VI |
|
VEE=OV VCC=OV |
VIVCC VIVEE |
6 -6 |
V V |
|
Iout |
Output Current |
Continuous |
|
50 100 |
mA mA |
|
LBB |
VBB Sink/Source |
|
|
±0.5 |
mA |
|
TA |
Operating Temperature Range |
|
|
40 to +85 |
°C |
|
TSTY |
Storage Temperature Range |
|
|
65 to +150 |
°C |
|
JA |
Thermal Resistance (JunctiontoAmbient) |
0 LFPM 500 LFPM |
20 TSSOP 20 TSSOP |
140 100 |
°C/W |
|
JC |
Thermal Resistance (JunctiontoCase) |
std bd |
20 TSSOP |
23 to 41 |
°C/W |
|
JA |
Thermal Resistance (JunctiontoAmbient) |
0 LFPM 500 LFPM |
20 SOIC 20 SOIC |
90 60 |
°C/W |
|
JC |
Thermal Resistance (JunctiontoCase) |
std bd |
20 SOIC |
30 to 35 |
°C/W |
|
Tsol |
|
|
|
|
|
MC100EP17 Features
•220 ps Typical Propagation Delay
•Maximum Frequency >3.0 GHz Typical
•PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V
•NECL Mode Operating Range: VCC= 0 V with VEE= 3.0 V to 5.5 V
•Open Input Default State
•Safety Clamp on Inputs
•Q Output Will Default LOW with Inputs Open or at VEE
•VBB OUTPUT
•Maximum Frequency >3.0 GHz Typical
•PECL Mode Operating Range: VCC= 3.0 V to 5.5 V with VEE= 0 V
•NECL Mode Operating Range: VCC= 0 V with VEE= 3.0 V to 5.5 V
•Open Input Default State
•Safety Clamp on Inputs
•Q Output Will Default LOW with Inputs Open or at VEE
•VBB OUTPUT
MC100EP17 Typical Application
AN1404ECLinPS Circuit Performance at NonStandard VIHLevels
AN1405ECL Clock Distribution Techniques
AN1406Designing with PECL (ECL at +5.0 V)
AN1504Metastability and the ECLinPS Family
AN1568Interfacing Between LVDS and ECL
AN1650Using WireOR Ties in ECLinPS Designs
AN1672The ECL Translator Guide
AND8001Odd Number Counters Design
AND8002Marking and Date Codes
AND8009ECLinPS Plus Spice I/O Model Kit
AND8020Termination of ECL Logic Devices
AN1405ECL Clock Distribution Techniques
AN1406Designing with PECL (ECL at +5.0 V)
AN1504Metastability and the ECLinPS Family
AN1568Interfacing Between LVDS and ECL
AN1650Using WireOR Ties in ECLinPS Designs
AN1672The ECL Translator Guide
AND8001Odd Number Counters Design
AND8002Marking and Date Codes
AND8009ECLinPS Plus Spice I/O Model Kit
AND8020Termination of ECL Logic Devices
MC100EP17 Connection Diagram
MC100EP17
PDF/DataSheet Download
- Datasheet: MC100EP17
- File Size: 73728 KB
- Manufacturer: ON SEMICONDUCTOR
- Click here to Download
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MC100EP16VC
The MC100EP16VC is a differential receiver/driver. The device is functionally equivalent to the EP16 and LVEP16 devices but with high gain and enable output.The MC100EP16VC provides an EN input which is synchronized with the data input (D) signal in a way th...
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