MC100LVEL56

The MC100LVEL56 is designed as a dual, fully differential 2:1 multiplexer. The MC100EL56 is pin and functionally equivalent to the MC100LVEL56 but is specified for operation at the standard 100E ECL voltage supply. The differential data path makes the device ideal for multiplexing low skew clock or other skew sensitive signals. Multiple Vbb pins are provided to ease AC coupling input signals (for more information on AC coupling ECL signals refer to the interfacing section of the ECLinPS data book DL140/D).

MC100LVEL56 has seven features. (1)Differential inputs and outputs. (2)20-lead SOIC packaging. (3)440ps typical propagation delays. (4)Separate and common select. (5)Supports both standard and low voltage 100K ECL. (6)Internal input pulldowns. (7) Larger than 2000V ESD protection. Those are all the main features.

Some DC electrical characteristics of MC100LVEL56 have been concluded into several points as follow. (1)Its power supply current would be typ 20mA and max 24mA. (2)Its output reference voltage would be min -1.38V and max -1.26V. (3)Its input high current would be max 150uA. (4)Its input low current would be min 0.5uA for Dn. (5)Its input sensitivity would be min 50V. Those are all the main DC electrical characteristics.

Also some AC electrical characteristics of MC100LVEL56 are concluded as follow. (1)Its propagation delay to output would be min 360ps and max 560ps for D (diff). (2)Its within-device skew would be typ 40ps and max 80ps. (3)Its duty cycle skew would be max 100ps. (4)Its minimum input swing would be min 150mV and max 1000mV. (5)Its common mode range would be min -2.1V and max -0.4V for Vpp<500mV and would be min -1.9V and max -0.4V for Vpp>=500mV. (6)Its output rise/fall times Q (20% to 80%) would be min 200ps and max 540ps. And so on. If you have any question or suggestion or want to know more information about MC100LVEL56 please contact us for details. Thank you!