Purchase MC10E122, In-stock MC10E122 From SeekIC.
MFG:MOT D/C:00+
Part Number: MC10E122
MFG: MOT
D/C: 00+
Description: The MC10E/100E122 is a 9-bit buffer. The device contains ninenon-inverting buffer gates.<...
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MC10E122
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DataSheet
General Description
MC10E122 General Description
The MC10E/100E122 is a 9-bit buffer. The device contains nine non-inverting buffer gates.
MC10E122 Features
• 500ps Max. Propagation Delay
• Extended 100E VEE Range of 4.2V to 5.46 V
• 75k Input Pulldown Resistors
• Extended 100E VEE Range of 4.2V to 5.46 V
• 75k Input Pulldown Resistors
MC10E122 Connection Diagram
MC10E122
PDF/DataSheet Download
- Datasheet: MC10E122
- File Size: 63293 KB
- Manufacturer: ONSEMI [ON Semiconductor]
- Click here to Download
- ·MC1000
- MOTOROLA [Motorola, Inc]
- 6-INPUT GATES
- 205166 KB
- ·MC1001
- MOTOROLA [Motorola, Inc]
- 6-INPUT GATES
- 205166 KB
- ·MC100193
- ON SEMICONDUCTOR
- 5V ECL Error Detection/Correction Circuit
- 124927 KB
- ·MC1002
- MOTOROLA [Motorola, Inc]
- 6-INPUT GATES
- 205166 KB
- ·MC100210
- ON SEMICONDUCTOR
- 5V ECL Dual 1:4, 1:5 Differential Fanout Buffer
- 225280 KB
- ·MC100241
- ON SEMICONDUCTOR
- 5V ECL 8-Bit Scannable Register
- 225280 KB
- ·MC100256
- ON SEMICONDUCTOR
- 5V ECL 3 Bit 4:1 Mux Latch
- 124927 KB
- ·MC1003
- MOTOROLA [Motorola, Inc]
- 6-INPUT GATES
- 205166 KB
MC10E122 Relative Products
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MC10E116FN
TheMC10E/100E116 is a quint differentialline receivr withemitter-followeroutputs. An internally generated reference supply (VBB)is available for single-ended reception.
MC10E116
The MC10E/100E116 is a quint differential line receiver with emitter-follower outputs. An internally generated reference supply (VBB) is available for single-ended reception.
MC10E112FNR2G
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MC10E112FN
TheMC10E/100E112 is a quad driver with two pairs of OR/NORoutputsfrom each gate, and a common, buffered enable input. Usingthedatainputs the device can serve as an ECL memory addressfan-outdriver.Using just the enable input, the device serves as a clock driv...
MC10E112
TheMC10E/100E112 is a quad driver with two pairs of OR/NORoutputsfrom each gate, and a common, buffered enable input. Usingthedatainputs the device can serve as an ECL memory addressfan-out driver.Using just the enable input, the device serves as a clock dri...
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