MC10E164

MC10E163

The MC10E/100E163 contains two 8:1 multiplexers with differential outputs and common select inputs. The select inputs (SEL0, 1, 2) control which one of the eight data inputs (A0 A7, B0 B7) is propagated to the output

MC10E160

The MC10E/100E160 is a 12-bit parity generator/checker. The Q output is HIGH when an odd number of inputs are HIGH. A HIGH on the Enable input (EN ) forces the Q output LOW.The MC10E/100E160 also features an output register. Multiplexers direct the register ...

MC10E158

MC10E157

The MC10E/100E157 contains four 2:1 multiplexers with differential outputs. The output data are controlled by the individual Select (SEL) inputs. The individual select control makes the devices well suited for random logic designs.

MC10E156FN

The MC10E/100E156 contains three 4:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output date of MC10E/100E156is controlled by the multiplexer select contr...

MC10E156

The MC10E/100E156 contains three 4:1 multiplexers followed by transparent latches with differential outputs. When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output date of MC10E/100E156is controlled by the multiplexer select contr...