MC10E196FN

The MC10E196FN is a kind of programmable delay chip (PDC). The device is designed primarily for very accurate differential ECL input edge placement applications.The delay section includes a chain of gates and a linear ramp delay adjust organized as shown in the logic symbol. The first two delay elements feature gates that have been modified to have delays 1.25 and 1.5 times the basic gate delay of approximately 80 ps.

There are some features as follows: (1)2.0 ns Worst Case Delay Range; (2)20 ps/Delay Step Resolution; (3)Linear Input for Tighter Resolution; (4)>1.0 GHz Bandwidth; (5)On Chip Cascade Circuitry; (6)PECL Mode Operating Range: VCC = 4.2 V to 5.7 V with VEE = 0 V; (7)NECL Mode Operating Range: VCC = 0 V with VEE = .4.2 V to .5.7 V; (8)Internal Input 50 k Pulldown Resistors; (9)ESD Protection: Human Body Model; > 1 kV,Machine Model; >  75 V; (10)Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test; (11)Moisture Sensitivity Level: Pb = 1; Pb-Free = 3; (12)Flammability Rating: UL 94 V-0 @ 1.125 in,Oxygen Index: 28  to 34; (13)Transistor Count = 425 devices; (14)Pb-Free Packages are Available.

Then is about the absolute maximum ratings: (1)VCC, PECL Mode Power Supply: 8 V when VEE=0 V; (2)VEE, NECL Mode Power Supply: -8 V when VCC=0 V; (3)IBB, VBB Sink/Source: ±0.5 mA; (4)VI, PECL Mode Input Voltage: 6 V when VEE=0 V, VIVCC; (5)VI, NECL Mode Input Voltage: -6 V when VCC=0 V, VIVEE; (6)Iout, Output Current Continuous: 50 mA; (7)Iout, Output Current Surge: 100 mA; (8)TA, Operating Temperature Range: -40 to +85; (9)Tstg, Storage Temperature Range: -65 to +150.