MC10EP451MC100EP451

The MC10/100EP451 is a 6−bit fully differential register withcommon clock and single−ended Master Reset (MR). It is ideal forvery high frequency applications where a registered data path isnecessary.

All inputs have a 75 k pulldown resistor internally. Differentialinputs have an override clamp. Unused differential register inputs canbe left open and will default LOW. When the differential inputs areforced to < V_EE + 1.2 V, the clamp will override and force the output toa default state. When in the default state, and since the flip−flop is edgetriggered, the output reaches a determined, but not predicted, validstate.

The positive transition of CLK (pin 4) will latch the registers.Master Reset (MR) HIGH will asynchronously reset all registersforcing Q outputs to go LOW.

The 100 Series contains temperature compensation.