MC14076BCP General Description
The MC14076B 4Bit Register consists of four Dtype flipflops operating synchronously from a common clock. OR gated outputdisable inputs force the outputs into a highimpedance state for use in bus organized systems. OR gated datadisable inputs cause the Q outputs to be fed back to the D inputs of the flipflops. Thus they are inhibited from changing state while the clocking process remains undisturbed. An asynchronous master root is provided to clear all four flipflops simultaneously independent of the clock or disable inputs.
MC14076BCP Maximum Ratings
MC14076BCP Features
• ThreeState Outputs with Gated Control Lines
• Fully Independent Clock Allows Unrestricted Operation for the Two Modes: Parallel Load and Do Nothing
• Asynchronous Master Reset
• Four Bus Buffer Registers
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two LowPower TTL Loads or One LowPower Schottky TTL Load Over the Rated Temperature Range
MC14076BCP Connection Diagram
Map list: ABCDEFGHIJKLMNOPQRSTUVWXYZ 0123456789All