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MFG:MOT D/C:N/A
Part Number: MC54HC165
MFG: MOT
D/C: N/A
Description: The MC54/74HC165 is identical in pinout to the LS165. The device inputs are compatible with standard C...
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MC54HC165
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DataSheet
General Description
MC54HC165 General Description
The MC54/74HC165 is identical in pinout to the LS165. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.
This device is an 8bit shift register with complementary outputs from the last stage. Data may be loaded into the register either in parallel or in serial form. When the Serial Shift/Parallel Loadinput is low, the data is loaded asynchronously in parallel. When the Serial Shift/Parallel Loadinput is high, the data is loaded serially on the rising edge of either Clock or Clock Inhibit (see the Function Table).
The 2input NOR clock may be used either by combining two independent clock sources or by designating one of the clock inputs to act as a clock inhibit.
MC54HC165 Maximum Ratings
|
Symbol |
Parameter |
Value |
Unit |
|
VCC |
DC Supply Voltage (Referenced to GND) |
0.5 to +7.0 |
V |
|
Vin |
DC Input Voltage (Referenced to GND) |
1.5 to VCC +1.5 |
V |
|
Vout |
DC Output Voltage (Referenced to GND) |
0.5 to VCC + 0.5 |
V |
|
Iin |
DC Input Current, per Pin |
± 20 |
mA |
|
Iout |
DC Output Current, per Pin |
± 25 |
mA |
|
ICC |
DC Supply Current, VCC and GND Pins |
± 50 |
mA |
|
PD |
Power Dissipation in Still Air, Plastic or Ceramic DIP† SOIC Package† |
750 500 |
mW |
|
Tstg |
Storage Temperature |
65 to + 150 |
|
|
TL |
Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP, SOIC or TSSOP Package) (Ceramic DIP) |
260 300 |
should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/ from 65 ° to 125
Ceramic DIP: 10 mW/ from 100 ° to 125
SOIC Package: 7 mW/ from 65 ° to 125
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this highimpedance circuit. For proper operation, Vin and Vout should be constrained to the range GND (Vin or Vout) VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused outputs must be left open.
MC54HC165 Features
• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 A
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 286 FETs or 71.5 Equivalent Gates
MC54HC165 Connection Diagram
MC54HC165A
PDF/DataSheet Download
- Datasheet: MC54HC165A
- File Size: 143736 KB
- Manufacturer: MOTOROLA [Motorola, Inc]
- Click here to Download
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