MFG:MTO Package Cooled:QFP D/C:2007
MFG: MTO
Package Cooled: QFP
D/C: 2007
Description: The MC68160, B and C Enhanced Ethernet Interface Circuit is a BiCMOS device which supports both IEEE 8...
The MC68160, B and C Enhanced Ethernet Interface Circuit is a BiCMOS device which supports both IEEE 802.3* Access Unit Interface (AUI) and 10BASET Twisted Pair (TP) Interface media connections through external
isolation transformers. It encodes NRZ data to Manchester data and supplies the signals which are required for data communication via 10BASET or AUI interfaces. The MC68160, B and C gluelessly interface to the Ethernet controller contained in the MC68360 Quad Integrated Communications Controller (QUICC) device. The MC68160 also interfaces easily to most other industrystandard IEEE 802.3 LAN controllers.** Prior to twisted pair data reception, Smart Squelch circuitry qualifies input signals for correct amplitude, pulse width, and sequence requirements.
|
Characteristic |
Symbol |
Min |
Max |
Unit |
| Storage Temperature Range |
Tstg |
65 |
150 |
|
| Power Supply Voltage Range Analog Digital |
VDDA VDDD |
|
7.0 7.0 |
V |
| Voltage on any TTL compatible input pin with respect toGround Voltage on TPRX, ARX, or ACX input pins with respect to Ground |
V |
0.5 0.5 |
VDD + 0.5 6.0 |
V |
| Differential Voltage on TPRX, ARX, or ACX Input Pins |
VDIFF |
6.0 |
6.0 |
V |
The following procedure is applicable to all three versions MC68160, MC68160B and MC68160C. References to the MC68160 includes all the versions.
Resetting the MC68160 after power up.
In some applications, after initial power up, the MC68160 may not be able to transmit or receive data. This is usually
caused by the LOOP and TPFULDL control lines being active at the same time. This is an illegal condition during normal operation, it places the MC68160 into the production test mode.
To exit the test mode and return to normal: Set LOOP low, TPFULDL high and TPSQEL low. Then, while keeping
TPSQEL low, raise LOOP after 300 ms lower TPFULDL. This will put the MC68160 into test mode but also resets the
MC68160. After 500 ms lower LOOP to get out of the test mode. TPFULDL may then be deasserted if desired.
The MC68160 is now ready for operation.
A hardware implementation of this fix would be to place a pull down resistor on the TPSQEL pin. Even if test mode is
entered by accident, this ensures that zero's will be written to the test register. The hardware implementation will solve the problem if the test mode is entered because of noise on the TPSQEL pin. If the controller is toggling the MC68160 lines while it is booting up, the reset procedure must be followed.
MC68160
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32-BIT TO 8/16/32-BIT BSI
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