MC68331 General Description
MC68331 Features
• Modular Architecture
• Central Processing Unit (CPU32)
- Upward Object Code Compatible
- New Instructions for Controller Applications
- 32-Bit Architecture
- Virtual Memory Implementation
- Loop Mode of Instruction Execution
- Table Lookup and Interpolate Instruction
- Improved Exception Handling for Controller Applications
- Trace on Change of Flow
- Hardware Breakpoint Signal, Background Mode
- Fully Static Operation
• System Integration Module (SIM)
- External Bus Support
- Programmable Chip-Select Outputs
- System Protection Logic
- Watchdog Timer, Clock Monitor, and Bus Monitor
- System Protection Logic
- System Clock Based on 32.768-kHz Crystal for Low Power Operation
- Test/Debug Submodule for Factory/User Test and Development
• Queued Serial Module (QSM)
- Enhanced Serial Communication Interface (SCI), Universal Asynchronous Receiver Transmitter
(UART): Modulus Baud Rate, Parity
- Queued Serial Peripheral Interface (QSPI): 80-Byte RAM, Up to 16 Automatic Transfers
- Dual Function I/O Ports
- Continuous Cycling, 8 to 16 Bits per Transfer
• General-Purpose Timer (GPT)
- Two 16-Bit Free-Running Counters With One Nine-Stage Prescaler
- Three Input Capture Channels
- Four Output Compare Channels
- One Input Capture/Output Compare Channel
- One Pulse Accumulator/Event Counter Input
- Two Pulse-Width Modulation Outputs
- Optional External Clock Input
MC68331 Connection Diagram
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