MC68HC08KH12 Maximum Ratings
MC68HC08KH12 Features
• High-Performance M68HC08 Architecture
• Fully Upward-Compatible Object Code with M6805, M146805,and M68HC05 Families
• 6 MHz Internal Bus Operation
• Low-Power Design (Fully Static with Stop and Wait Modes)
• 12 KBytes of User ROM (MC68HC08KH12) or One-Time Programmable (OTP) ROM (MC68HC708KH12)
• On-Chip Programming Firmware for Use with Host Personal Computer
• ROM/OTPROM Data Security1
• 384 Bytes of On-Chip Random Access Memory (RAM)
• 42 General Purpose I/O, 29 with Software Configurable Pullups
• 16-Bit, 2-Channel Timer Interface Module (TIM)
• 20-Bit Keyboard Interrupt Port
• 5 LED Direct Drive Port Pins
• 48MHz Phase-Locked Loop
• Full Universal Serial Bus Specification 1.1 Composite HUB with Embedded1 Functions:
1 * 12MHz Upstream Port
4 * 12MHz/1.5MHz Downstream Ports
1 * Hub Control Endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
1 * Hub Interrupt Endpoint (Endpoint1) with 1 byte transmit buffer
1 * Device Control Endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
Device Interrupt Endpoints (Endpoint1 and Endpoint2) share with 8 byte transmit buffer
• On-chip 3.3V regulator for USB Transceiver
• System Protection Features
Optional Computer Operating Properly (COP) Reset
Illegal Opcode Detection with Optional Reset
Illegal Address Detection with Optional Reset
• Master Reset Pin with Internal Pullup and Power-On Reset
• An External Asynchronous Interrupt Pin with Internal Pullup (IRQ1)
• 64-pin plastic quad flatpack (QFP) package
MC68HC08KH12 Connection Diagram
Map list: ABCDEFGHIJKLMNOPQRSTUVWXYZ 0123456789All