Purchase MC68HC08KH12A, In-stock MC68HC08KH12A From SeekIC.
Part Number: MC68HC08KH12A
Description: The MC68HC08KH12A is a member of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs). A...
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MC68HC08KH12A
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DataSheet
General Description
MC68HC08KH12A General Description
The MC68HC08KH12A is a member of the low-cost, high-performance M68HC08 Family of 8-bit microcontroller units (MCUs). All MCUs in the family use the enhanced M68HC08 central processor unit (CPU08) and are available with a variety of modules, memory sizes and types, and package types.
MC68HC08KH12A Maximum Ratings
| Characteristic | Symbol | Value | Unit |
| Supply Voltage | VDD | 0.3 to +6.0 | V |
| Input Voltage (except USB port pins) |
Vin | VSS 0.3 to VDD + 0.3 |
V |
| Programming Voltage | VPP | VSS0.3 to 14.0 | V |
| USB Port Pins | VUSB | 1 to 4.6 | V |
| Maximum current per pin excluding VDD and VSS |
I | ± 25 | mA |
| Storage temperature | Tstg | 55 to +150 | °C |
| Maximum current out of VSS | IMVSS | 100 | mA |
| Maximum current into VDD | IMVDD | 100 | mA |
MC68HC08KH12A Features
Features of the MC68HC08KH12A include the following:
• High-performance M68HC08 architecture
• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
• 6-MHz internal bus operation
• Low-power design (fully static with stop and wait modes)
• 12K-bytes of user ROM with data security(1)
• 384 bytes of on-chip RAM
• 42 general purpose I/O, 29 with software configurable pullups
• 16 bit, 2-channel timer interface module (TIM)
• 20-bit keyboard interrupt port
• 5 LED direct drive port pins
• 48-MHz phase-locked loop
• Full universal serial bus specification 1.1 composite HUB with embedded(2) functions:
1 * 12-MHz upstream port
4 * 12-MHz/1.5MHz downstream ports
1 * Hub control endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
1 * Hub interrupt endpoint (Endpoint1) with 1 byte transmit buffer
1 * device control endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
Device interrupt endpoints (Endpoint1 and Endpoint2) share with 8 byte transmit buffer
• On-chip 3.3V regulator for USB transceiver
• System protection features
Optional computer operating properly (COP) reset
Illegal opcode detection with optional reset
Illegal address detection with optional reset
• Master reset pin with internal pullup and power-on reset
• An external asynchronous interrupt pin with internal pullup (IRQ1)
• 64-pin plastic quad flat pack (QFP) package, 52-pin low-profile quad flat pack (LQFP)
Features of the CPU08 include the following:
• Enhanced HC05 programming model
• Extensive loop control functions
• 16 addressing modes (eight more than the HC05)
• 16-bit index register and stack pointer
• Memory-to-memory data transfers
• Fast 8 * 8 multiply instruction
• Fast 16/8 divide instruction
• binary-coded decimal (BCD) instructions
• Optimization for controller applications
• Third party C language support
• High-performance M68HC08 architecture
• Fully upward-compatible object code with M6805, M146805, and M68HC05 Families
• 6-MHz internal bus operation
• Low-power design (fully static with stop and wait modes)
• 12K-bytes of user ROM with data security(1)
• 384 bytes of on-chip RAM
• 42 general purpose I/O, 29 with software configurable pullups
• 16 bit, 2-channel timer interface module (TIM)
• 20-bit keyboard interrupt port
• 5 LED direct drive port pins
• 48-MHz phase-locked loop
• Full universal serial bus specification 1.1 composite HUB with embedded(2) functions:
1 * 12-MHz upstream port
4 * 12-MHz/1.5MHz downstream ports
1 * Hub control endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
1 * Hub interrupt endpoint (Endpoint1) with 1 byte transmit buffer
1 * device control endpoint (Endpoint0) with 8 byte transmit buffer and 8 byte receive buffer
Device interrupt endpoints (Endpoint1 and Endpoint2) share with 8 byte transmit buffer
• On-chip 3.3V regulator for USB transceiver
• System protection features
Optional computer operating properly (COP) reset
Illegal opcode detection with optional reset
Illegal address detection with optional reset
• Master reset pin with internal pullup and power-on reset
• An external asynchronous interrupt pin with internal pullup (IRQ1)
• 64-pin plastic quad flat pack (QFP) package, 52-pin low-profile quad flat pack (LQFP)
Features of the CPU08 include the following:
• Enhanced HC05 programming model
• Extensive loop control functions
• 16 addressing modes (eight more than the HC05)
• 16-bit index register and stack pointer
• Memory-to-memory data transfers
• Fast 8 * 8 multiply instruction
• Fast 16/8 divide instruction
• binary-coded decimal (BCD) instructions
• Optimization for controller applications
• Third party C language support
MC68HC08KH12A Connection Diagram
MC68HC08KH12A
PDF/DataSheet Download
- Datasheet: MC68HC08KH12A
- File Size: 2022955 KB
- Manufacturer: FREESCALE
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