MC68HC11A1FN

The MC68HC11A1FN is one member of the MC68HC11A1 series.It has the following features including (1)computer operating properly (COP) watchdog system;(2)synchronous serial peripheral interface (SPI);(3)asynchronous nonreturn to zero (NRZ) serial communications interface (SCI);(4)8-channel, 8-Bit analog-to-digital (A/D) converter;(5)available in 48-pin dual in-line package (DIP) or 52-pin plastic leaded chip carrier (PLCC).

The MC68HC11A1 high-performance microcontroller units (MCUs) are based on the M68HC11 Family. These high speed, low power consumption chips have multiplexed buses and a fully static design. The chips can operate at frequencies from 3 MHz to dc. The three MCUs are created from the same masks; the only differences are the value stored in the CONFIG register, and whether or not the ROM or EEPROM is tested and guaranteed.In expanded multiplexed operating mode, the MCU can access a 64 Kbyte address space. The space includes the same on-chip memory addresses used for single-chip mode plus external peripheral and memory devices. The expansion bus is made up of ports B and C and control signals AS and R/W.The address, R/W, and AS signals are active and valid for all bus cycles including accesses to internal memory locations.

For some interrupt sources, such as the parallel I/O and SCI interrupts, the flags are automatically cleared during the course of responding to the interrupt requests. For example, the RDRF flag in the SCI system is cleared by the automatic clearing mechanism, which consists of a read of the SCI status register while RDRF is set, followed by a read of the SCI data register. The normal response to an RDRF interrupt request is to read the SCI status register to check for receive errors, then to read the received data from the SCI data register. These two steps satisfy the automatic clearing mechanism without requiring any special instructions.The real-time interrupt (RTI) function generates hardware interrupts at a fixed periodic rate.These hardware interrupts provide a time reference signal for routines that measure real time. The routine notes the number of times a particular interrupt has occurred and multiplies that number by the predetermined subroutine execution time.