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MFG:MOT  Package Cooled:DIP-14  D/C:89+  

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Part Number: MC74HC73

 

MFG: MOT

Package Cooled: DIP-14

D/C: 89+

Description: The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pull...


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MC74HC73 General Description


The MC74HC73 is identical in pinout to the LS73. The device inputs are compatible with standard CMOS outputs; with pullup resistors, they are compatible with LSTTL outputs.

Each flip flop is negativeedge clocked and has an activelow asynchronous reset.

The MC74HC73 is identical in function to the HC107, but has a different pinout.

MC74HC73 Maximum Ratings

Symbol Parameter Value Unit
vcc DC Supply Voltage (Referenced to GND) 0.5 to +7.0 V
VIN DC Input Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
VOUT DC Output Voltage (Referenced to GND) 0.5 to VCC + 0.5 V
LIN DC Input Current, per Pin ±20 mA
IOUT DC Onput Current, per Pin ±25 mA
ICC DC Supply Current Per Supply Pin ±50 mA
PD Power dissipation in still air piastic DIP
SOIC package
750
500
 mW
TSTG Storage Temperature 65 to +150 °C
TL Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)		 260 °C
* Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
†Derating - Plastic DIP: 10 mW/C from 65 to 125C
Ceramic DIP: 10 mW/C from 100 to 125C
SOIC Package: 7 mW/C from 65 to 125C
For high frequency or heavy load considerations, see Chapter 2 of the Motorola HighSpeed CMOS Data Book (DL129/D).

MC74HC73 Features

• Output Drive Capability: 10 LSTTL Loads
• Outputs Directly Interface to CMOS, NMOS, and TTL
• Operating Voltage Range: 2 to 6 V
• Low Input Current: 1 mA
• High Noise Immunity Characteristic of CMOS Devices
• In Compliance with the Requirements Defined by JEDEC Standard No. 7A
• Chip Complexity: 92 FETs or 23 Equivalent Gates

MC74HC73 Connection Diagram

MC74HC73 Connection Diagram

MC74HC73 datasheet

MC74HC73
PDF/DataSheet Download

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