Purchase MC9S12D, In-stock MC9S12D From SeekIC.
- Table of contents:
MC9S12D
-
Suppliers
DataSheet
General Description
MC9S12D Features
Not all features listed here are available in all configurations.
Additional information about D and B family inter-operability is given in:
EB386 "HCS12 D-Family Compatibility Considerations" and
EB388 "Using the HCS12 D-Family as a development platform for the HCS12 B family"
• 16-bit CPU12
- Upward compatible with M68HC11 instruction set
- Interrupt stacking and programmer's model identical to M68HC11
- HCS12 Instruction queue
- Enhanced indexed addressing
• Multiplexed bus
- Single chip or expanded
- 16 address/16 data wide or 16 address/8 data narrow modes
- External address space 1MByte for Data and Program space (112 pin package only)
• Wake-up interrupt inputs depending on the package option
- 8-bit port H
- 2-bit port J1:0
- 2-bit port J7:6 shared with IIC, CAN4 and CAN0 module
- 8-bit port P shared with PWM or SPI1,2
• Memory options
- 32K, 64K, 128K, 256K, 512K Byte Flash EEPROM
- 1K, 2K, 4K Byte EEPROM
- 2K, 4K, 8K, 12K, 14K Byte RAM
• Analog-to-Digital Converters
- One or two 8-channel modules with 10-bit resolution depending on the package option
- External conversion trigger capability
• Up to five 1M bit per second, CAN 2.0 A, B software compatible modules
- Five receive and three transmit buffers
- Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
- Four separate interrupt channels for Receive, Transmit, Error and Wake-up
- Low-pass filter wake-up function in STOP mode
- Loop-back for self test operation
• Enhanced Capture Timer (ECT)
- 16-bit main counter with 7-bit prescaler
- 8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer
- Input capture filters and buffers, three successive captures on four channels, or two captures on four channels with a capture/compare selectable on the remaining four
- Four 8-bit or two 16-bit pulse accumulators
- 16-bit modulus down-counter with 4-bit prescaler
- Four user-selectable delay counters for signal filtering
• 8 PWM channels with programmable period and duty cycle (7 channels on 80 Pin Packages)
- 8-bit, 8-channel or 16-bit, 4-channel
- Separate control for each pulse width and duty cycle
- Center- or left-aligned outputs
- Programmable clock select logic with a wide range of frequencies
• Serial interfaces
- Two asynchronous serial communications interfaces (SCI)
- Up to three synchronous serial peripheral interfaces (SPI)
- IIC
• SAE J1850 Compatible Module (BDLC)
- 10.4 kbps Variable Pulse Width format
- Byte level receive and transmit
- 4x receive mode supported
• SIM (System Integration Module)
- CRG (windowed COP watchdog, real time interrupt, clock monitor, clock generation and reset)
- MEBI (multiplexed external bus interface)
- INT (interrupt control)
• Clock generation
- Phase-locked loop clock frequency multiplier
- Limp home mode in absence of external clock
- Clock Monitor
- Low power 0.5 to 16 MHz crystal oscillator reference clock
• Operating frequency for ambient temperatures TA -40 <= TA <= 125
- 50MHz equivalent to 25MHz Bus Speed for single chip
40MHz equivalent to 20MHz Bus Speed in expanded bus modes.
• Internal 5V to 2.5V Regulator
• 112-Pin LQFP or 80-Pin QFP package
- I/O lines with 5V input and drive capability
- 5V A/D converter inputs and 5V I/O
- 2.5V logic supply
• Development support
- Single-wire background debug™ mode (BDM)
- On-chip hardware breakpoints
Additional information about D and B family inter-operability is given in:
EB386 "HCS12 D-Family Compatibility Considerations" and
EB388 "Using the HCS12 D-Family as a development platform for the HCS12 B family"
• 16-bit CPU12
- Upward compatible with M68HC11 instruction set
- Interrupt stacking and programmer's model identical to M68HC11
- HCS12 Instruction queue
- Enhanced indexed addressing
• Multiplexed bus
- Single chip or expanded
- 16 address/16 data wide or 16 address/8 data narrow modes
- External address space 1MByte for Data and Program space (112 pin package only)
• Wake-up interrupt inputs depending on the package option
- 8-bit port H
- 2-bit port J1:0
- 2-bit port J7:6 shared with IIC, CAN4 and CAN0 module
- 8-bit port P shared with PWM or SPI1,2
• Memory options
- 32K, 64K, 128K, 256K, 512K Byte Flash EEPROM
- 1K, 2K, 4K Byte EEPROM
- 2K, 4K, 8K, 12K, 14K Byte RAM
• Analog-to-Digital Converters
- One or two 8-channel modules with 10-bit resolution depending on the package option
- External conversion trigger capability
• Up to five 1M bit per second, CAN 2.0 A, B software compatible modules
- Five receive and three transmit buffers
- Flexible identifier filter programmable as 2 x 32 bit, 4 x 16 bit or 8 x 8 bit
- Four separate interrupt channels for Receive, Transmit, Error and Wake-up
- Low-pass filter wake-up function in STOP mode
- Loop-back for self test operation
• Enhanced Capture Timer (ECT)
- 16-bit main counter with 7-bit prescaler
- 8 programmable input capture or output compare channels; 4 of the 8 input captures with buffer
- Input capture filters and buffers, three successive captures on four channels, or two captures on four channels with a capture/compare selectable on the remaining four
- Four 8-bit or two 16-bit pulse accumulators
- 16-bit modulus down-counter with 4-bit prescaler
- Four user-selectable delay counters for signal filtering
• 8 PWM channels with programmable period and duty cycle (7 channels on 80 Pin Packages)
- 8-bit, 8-channel or 16-bit, 4-channel
- Separate control for each pulse width and duty cycle
- Center- or left-aligned outputs
- Programmable clock select logic with a wide range of frequencies
• Serial interfaces
- Two asynchronous serial communications interfaces (SCI)
- Up to three synchronous serial peripheral interfaces (SPI)
- IIC
• SAE J1850 Compatible Module (BDLC)
- 10.4 kbps Variable Pulse Width format
- Byte level receive and transmit
- 4x receive mode supported
• SIM (System Integration Module)
- CRG (windowed COP watchdog, real time interrupt, clock monitor, clock generation and reset)
- MEBI (multiplexed external bus interface)
- INT (interrupt control)
• Clock generation
- Phase-locked loop clock frequency multiplier
- Limp home mode in absence of external clock
- Clock Monitor
- Low power 0.5 to 16 MHz crystal oscillator reference clock
• Operating frequency for ambient temperatures TA -40 <= TA <= 125
- 50MHz equivalent to 25MHz Bus Speed for single chip
40MHz equivalent to 20MHz Bus Speed in expanded bus modes.
• Internal 5V to 2.5V Regulator
• 112-Pin LQFP or 80-Pin QFP package
- I/O lines with 5V input and drive capability
- 5V A/D converter inputs and 5V I/O
- 2.5V logic supply
• Development support
- Single-wire background debug™ mode (BDM)
- On-chip hardware breakpoints
MC9S12D Connection Diagram
MC9S12D
PDF/DataSheet Download
- Datasheet: MC9S12D
- File Size: 382926 KB
- Manufacturer: MOTOROLA [Motorola, Inc]
- Click here to Download
- ·MC908AP16ACB
- FREESCALE [Freescale Semiconductor, Inc]
- Microcontrollers
- 1484309 KB
- ·MC908AP16ACFA
- FREESCALE [Freescale Semiconductor, Inc]
- Microcontrollers
- 1484309 KB
- ·MC908GR16ACFA
- FREESCALE [Freescale Semiconductor, Inc]
- M68HC08 Microcontrollers
- 1930870 KB
- ·MC908GR4CDWR2
- MOTOROLA [Motorola, Inc]
- Microcontrollers
- 3179232 KB
- ·MC908GR4CFAR2
- MOTOROLA [Motorola, Inc]
- Microcontrollers
- 3179232 KB
- ·MC908GR4MDWR2
- MOTOROLA [Motorola, Inc]
- Microcontrollers
- 3179232 KB
- ·MC908GR4MFAR2
- MOTOROLA [Motorola, Inc]
- Microcontrollers
- 3179232 KB
- ·MC908GR4VDWR2
- MOTOROLA [Motorola, Inc]
- Microcontrollers
- 3225931 KB
MC9S12D Relative Products
MC9S12C96VPBER
IC MCU 96K FLASH 4K RAM 52-LQFP
MC9S12C96VPBE
IC MCU 96K FLASH 4K RAM 52-LQFP
MC9S12C96VFUE
IC MCU 96K FLASH 4K RAM 80-QFP
MC9S12C96VFAE
IC MCU 96K FLASH 4K RAM 48-LQFP
MC9S12C96MPBER
IC MCU 96K FLASH 4K RAM 52-LQFP
MC9S12C96MPBE
IC MCU 96K FLASH 4K RAM 52-LQFP
Hotspot Suppliers Product
LMV301MGX
Price: 0.11-0.2 USD
CMOS operational amplifier, low voltage operation, low input bias current
TPA3110D2PWPR
Price: 1.6-1.8 USD
15w, filter-free stereo, class-d audio, power amplifier, 28-SOIC, -0.3 V to 30 V Supply Voltage
ADSP-21065LKSZ-264
Price: 10-30 USD
32-bit, processor, SRAM Memory
EP1C6T144C8N
Price: 10.5-11.7 USD
TQFP, cyclone FPGA, gate array, DDR SDRAM, fast cycle RAM, low-cost, 1.5V
BCM6349IPB
Price: 20-30 USD
SINGLE CHIP ADSL2 CPE CHIP BCM6349IPB
AZ7500BP-E1
Price: 0.3-1 USD
AZ7500BP-E1 - PULSE-WIDTH-MODULATION CONTROL CIRCUITS - BCD Semiconductor Manufacturing Limited
ADS1178IPAPRG4
Price: 8.73-9.52 USD
Octal, Simultaneous Sampling, 16-Bit Analog-to-Digital Converter, HTQFP-64, 10K/52K
CS8416-CZZR
Price: 0.91-1.53 USD
monolithic CMOS device, TSSOP, -0.3 (VL) to + 0.3 V, Low-Jitter Clock Recovery
AD1674TD/883
Price: 80-81 USD
12-bit, analog-to-digital converter, DIP-28, 0 V to +7 V, Industry Standard Pinout
UPC2581V
Price: 0.1-100 USD
UPC2581V, Integrated amplifier, NEC
XC2S30-5TQG144C
Price: 9-10 USD
SPARTAN-II, FPGA, 30K, 144-TQFP, 2.5V , –0.5 to 3.0 V, Second generation ASIC
H11L1M
Price: 0.1-2 USD
6-Pin DIP, Optocoupler, High data rate, 1MHz typical (NRZ), 16mA, Fairchild Semiconductor
