Features: Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibilitySpecifications Voltage at Any PinOperating Temperature RangeMM54C174MM74C174Storage Temperature RangePower DissipationDual-In-LineSmall OutlineOperating VCC RangeAbsolute Maximum VCCL...
MM54C174: Features: Wide supply voltage range Guaranteed noise margin High noise immunity Low power TTL compatibilitySpecifications Voltage at Any PinOperating Temperature RangeMM54C174MM74C174Storage...
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Voltage at Any Pin Operating Temperature Range MM54C174 MM74C174 Storage Temperature Range Power Dissipation Dual-In-Line Small Outline Operating VCC Range Absolute Maximum VCC Lead Temperature (Soldering, 10 seconds) |
- 0.3V to VCC + 0.3V - 55 to +125 - 40 to +85 - 65 to +150 700 mW 500 mW 3.0V to 15V 18V 260 |
The MM54C174/MM74C174 hex D flip-flop is a monolithic complementary MOS (CMOS) integrated circuit constructed with N- and P-channel enhancement transistors. All have a direct clear input. Information at the D inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse. Clear is independent of clock and accomplished by a low level at the clear input. All inputs of MM54C174 are protected by diodes to VCC and GND.