MFG:MITEL Package Cooled:PLCC
MFG: MITEL
Package Cooled: PLCC
Description: The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals...
The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized to either a 2.048 MHz, 1.544 MHz, or 8 kHz reference. The T1 and E1 outputs are fully compliant with AT & T TR62411 (ACCUNET® T1.5) and ETSI ETS 300 011 intrinsic jitter and jitter transfer specifications, respectively, when synchronized to primary reference input clock rates of either 1.544 MHz or 2.048 MHz.
The PLL also provides additional high speed output clocks at rates of 3.088 MHz, 4.096 MHz, 8.192 MHz, and 16.384 MHz for backplane synchronization.
| Parameter | Symbol | Min | Max | Units | |
| 1 | Supply Voltage | VDD | -0.3 | 7.0 | V |
| 2 | Voltage on any pin | VI | VSS-0.3 | VDD+0.3 | V |
| 3 | Input/Output Diode Current | IIK/OK | ±150 | mA | |
| 4 | Output Source or Sink Current | IO | ±150 | mA | |
| 5 | DC Supply or Ground Current | IDD/ISS | ±300 | mA | |
| 6 | Storage Temperature | TST | -55 | 125 | |
| 7 | Package Power Dissipation PLCC | PD | 900 | mW |
MT9041AP
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The MT9041 is a digital phase-locked loop (PLL) designed to provide timing and synchronization signals for T1 and E1 primary rate transmission links that are compatible with ST-BUS/GCI frame alignment timing requirements. The PLL outputs can be synchronized ...
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