Transistor Polarity
: N-Channel
Gate-Source Breakdown Voltage
: +/- 20 V
Configuration
: Single
Maximum Operating Temperature
: + 175 C
Mounting Style
: SMD/SMT
Packaging
: Reel
Continuous Drain Current
: 12 A
Drain-Source Breakdown Voltage
: 60 V
Resistance Drain-Source RDS (on)
: 0.18 Ohms
Package / Case
: TO-252AA
Features: • Avalanche Energy Specified
• IDSS and VDS(on) Specified at Elevated Temperature
• Static Parameters are the Same for both TMOS V and TMOS EFET
• Surface Mount Package Available in 16 mm 13inch/2500 Unit Tape & Reel, Add T4 Suffix to Part NumberSpecifications
| Rating |
Symbol |
Value |
Unit |
| DraintoSource Voltage |
VDSS |
60 |
Vdc |
| DraintoGate Voltage (RGS = 1.0 M) |
VDGR |
60 |
Vdc |
GatetoSource Voltage - Continuous
GatetoSource Voltage - Nonrepetitive (tp 50 ms) |
VGS
VGSM |
± 15
± 20 |
Vdc
Vpk |
Drain Current - Continuous @ 25°C
- Continuous @ 100°C
- Single Pulse (tp 10 s) |
ID
ID
IDM |
12
8.0
37 |
Adc
Apk |
Total Power Dissipation @ 25°C
Derate above 25°C
Total Power Dissipation @ TA = 25°C, when mounted to minimum recommended pad size |
PD
|
48
0.32
1.75 |
Watts
W/°C
Watts |
| Operating and Storage Temperature Range |
TJ, Tstg |
55 to 150 |
°C |
Single Pulse DraintoSource Avalanche Energy - STARTING TJ = 25°C
(VDD = 25 Vdc, VGS = 5.0 Vdc, PEAK IL =12Apk, L = 1.0mH, RG = 25) |
EAS
|
72 |
mJ |
Thermal Resistance - Junction to Case
- Junction to Ambient
- Junction to Ambient, when mounted to minimum recommended pad size |
RJC
RJA
RJA |
3.13
100
71.4 |
°C/W
|
| Maximum Lead Temperature for Soldering Purposes, 1/8"from Case for 10 seconds |
TL |
260 |
°C |
Designer's Data for "Worst Case" Conditions - The Designer's Data Sheet permits the design of most circuits entirely from the information presented. SOA Limit
curves - representing boundaries on device characteristics - are given to facilitate "worst case" design.
EFET, Designer's and TMOS V are trademarks of Motorola, Inc. TMOS is a registered trademark of Motorola, Inc.
Thermal Clad is a trademark of the Bergquist Company.
Preferred devices are Motorola recommended choices for future use and best overall value.DescriptionMTD3055VL is a new technology designed to achieve an onresistance area product about onehalf that of standard MOSFETs. This new technology more than doubles the present cell density of our 50 and 60 volt TMOS devices. Just as with our TMOS EFET designs, MTD3055VL is designed to withstand high energy in the avalanche and commutation modes. Designed for low voltage, high speed switching applications in power supplies, converters and power motor controls, the MTD3055VL is particularly well suited for bridge circuits where diode speed and commutating safe operating areas are critical and offer additional safety margin against unexpected voltage transients.
Parameters: | Technical/Catalog Information | MTD3055VL |
| Vendor | Fairchild Semiconductor (VA) |
| Category | Discrete Semiconductor Products |
| Mounting Type | Surface Mount |
| FET Polarity | N-Channel |
| Drain to Source Voltage (Vdss) | 60V |
| Current - Continuous Drain (Id) @ 25° C | 12A |
| Rds On (Max) @ Id, Vgs | 180 mOhm @ 6A, 5V |
| Input Capacitance (Ciss) @ Vds | 570pF @ 25V |
| Power - Max | 1.5W |
| Packaging | Digi-Reel? |
| Gate Charge (Qg) @ Vgs | 10nC @ 5V |
| Package / Case | DPak, SC-63, TO-252 (2 leads+tab) |
| FET Feature | Logic Level Gate |
| Lead Free Status | Lead Free |
| RoHS Status | RoHS Compliant |
| Other Names | MTD3055VL
MTD3055VL
MTD3055VLDKR ND
MTD3055VLDKRND
MTD3055VLDKR
|
MTD3055VL Data Sheet
