MX806A

The MX806A LMR audio processor is intended too primarily to operate as the "Audio Terminal" or radio systems using the DBS800 Digitally Integrated Baseband Subsystem.

The MX806A half-duplex device has signal paths and level setting elements that are configured and adjusted by digital information sent from the radio microcontroller using C-BUS protocol. (C-BUS is the serial interface for all DBS 800 ICs.)

The Signal Path is divided into three sections: Input Process, Main process, and Mixing and Output Drives. If selected, signal level stability and output accuracy of the MX806A is maintained by a voltage-controlled gain system using selectable signal-level detectors. Signal levels can be dynamically controlled to provide "dynamic compensation" for factors such as temperature drift, VCO non-linearity, etc.

The MX806A audio stages can be completely disabled or the whole IC can be placed into powersave mode, leaving only clock and C-BUS circuitry active.

The MX806A may be used with a 5.0V power supply and is available in the following packages: 24-pin SOIC (MX806ADW), 24-pin PLCC (MX806ALH), and 24-pin PDIP (MX806AP).