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Part Number: NLAS324
Description: The NLAS324 is a dual SPST (Single Pole, Single Throw) switch, similar to 1/2 a standard 4066. The dev...
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NLAS324
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DataSheet
General Description
NLAS324 General Description
The NLAS324 is a dual SPST (Single Pole, Single Throw) switch, similar to 1/2 a standard 4066. The device permits the independent selection of 2 analog/digital signals. Available in the Ultra-Small 8 package.
The use of advanced 0.6 CMOS process, improves the RON resistance considerably compared to older higher voltage technologies.
NLAS324 Maximum Ratings
| Symbol | Parameter | Value | Unit |
| VCC | Positive DC Supply Voltage | -0.5 to +7.0 | V |
| VI | Analog Input Voltage (VNO or VCOM) | -0.5 to +7.0 | V |
| VO | DC Output Voltage | -0.5 to +7.0 | V |
| IIK | DC Input Diode Current VI < GND | -50 | mA |
| IOK | DC Output Diode Current VO < GND | -50 | mA |
| IO | DC Output Sink Current | ±50 | mA |
| ICC | DC Supply Current per Supply Pin | ±100 | mA |
| IGND | DC Ground Current per Ground Pin | ±100 | mA |
| TSTG | Storage Temperature Range | -65 to +150 | °C |
| TL | Lead Temperature, 1 mm from Case for 10 Seconds | 260 | °C |
| TJ | Junction Temperature under Bias | +150 | °C |
| JA | Thermal Resistance (Note 1) | 250 | °C/W |
| PD | Power Dissipation in Still Air at 85°C | 250 |
mW |
| MSL | Moisture Sensitivity | Level 1 | |
| FR | Flammability Rating Oxygen Index: 28 to 34 | UL 94 V-0 @ 0.125 in | |
| VESD | ESD Withstand Voltage Human Body Model (Note 2) Machine Model (Note 3) Charged Device Model (Note 4) |
> 2000 > 150 N/A |
V |
Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those indicated may adversely affect device reliability. Functional operation under absolute maximum-rated conditions is not implied. Functional operation should be restricted to the Recommended Operating Conditions.
1. Measured with minimum pad spacing on an FR4 board, using 10 mm-by-1 inch, 2-ounce copper trace with no air flow.
2. Tested to EIA/JESD22-A114-A.
3. Tested to EIA/JESD22-A115-A.
4. Tested to JESD22-C101-A.
NLAS324 Features
• On Resistance is 20 Typical at 5.0 V
• Matching is < 1 Between Sections
• 2 - 6 V Operating Range
• Ultra Low < 5 pC Charge Injection
• Ultra Low Leakage < 1 nA at 5.0 V, 25°C
• Wide Bandwidth > 200 MHz, -3 dB
• CMOS/TTL Compatible
• 2000 V ESD (HBM)
• Ron Flatness ± 6 at 5.0 V
• US8 Package
• Negative Enable
• Switches are Independent
• Matching is < 1 Between Sections
• 2 - 6 V Operating Range
• Ultra Low < 5 pC Charge Injection
• Ultra Low Leakage < 1 nA at 5.0 V, 25°C
• Wide Bandwidth > 200 MHz, -3 dB
• CMOS/TTL Compatible
• 2000 V ESD (HBM)
• Ron Flatness ± 6 at 5.0 V
• US8 Package
• Negative Enable
• Switches are Independent
NLAS324 Connection Diagram
NLAS324
PDF/DataSheet Download
- Datasheet: NLAS324
- File Size: 113888 KB
- Manufacturer: ONSEMI [ON Semiconductor]
- Click here to Download
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