NT68F62

·Operating voltage range: 4.5V to 5.5V
·CMOS technology for low power consumption
·6502 8-bit CMOS CPU core
·8 MHz operation frequency
·32K bytes of flash memory for Multi -Times Program
·512 bytes of RAM
·2Kbytes Masked BootROM for ISP.
·One 8-bit base timer
·13 channels of 8-bit PWM outputs with 5V open drain
·4 channel A/D converters with 6-bit resolution
·25 bi-directional I/O port pins (8 dedicated I/O pins)
·Hsync/Vsync signals processor for separate & composite signals, including hardware sync signals polarity detection and freq. counters with 2 sets of Hsync counting intervals
·Hsync/Vsync polarity controlled output, 5 selectable free run output signals and self-test patterns, automute function, half freq. I/O function
·Two built-in IIC bus interfaces support VESA DDC1/2B+
·Two layers of interrupt management NMI interrupt sources
- INTE0 (External INT with selectable edge trigger)
- INTMUTE (Auto Mute Activated) IRQ interrupt sources
- INTS0/1 (SCL Go-low INT)
- INTA0/1 (Slave Address Matched INT)
- INTTX0/1 (Shift Register INT)
- INTRX0/1 (Shift Register INT)
- INTNAK0/1 (No Acknowledge)
- INTSTOP0/1 (Stop Condition Occurred INT)
- INTE1 (External INT with Selectable Edge Trigger)
- INTV (VSYNC INT)
- INTMR (Base Timer INT)
- INTADC (AD Conversion Done INT)
·Hardware watch-dog timer function
·40-pin P-DIP and 42-pin S-DIP packages