PAC004DTFQR

High speed logic devices like HSTL (High Speed Transceiver Logic)PAC004DTFQR demand unique, high speed bus terminations. The dual Th¨|venin termination networ rovides 16 terminating channels per package, and optimizes signal integrity by reducing reflections and ringing. The terminations of PAC004DTFQR are available in a range of standard values and are ideal for use in HSTL busses.

As seen in the schematic, R1 is typically tied to V_CCandserves as a pull-up resistor, while R2 functions as a pull- down resistor and is tied to ground (or the most negative supply voltage). In addition, the equivalent Th¨|veni resistance (R1 in parallel with R2) should match the impedance of the trace. Ground-bounce and crosstalk of PAC004DTFQR are virtually eliminated using a proprietary lead-frame which includes four direct ground connections to the die substrate, as well as four double-bonded connections to V_CC, for a total of 8 commons. In addition, the resistors are trimmed to a tight absolute tolerance of 1% which provides tight impedance-matching and results in greatly reduced reflections. This unique proprietary design of PAC004DTFQR provides optimal signal integrity.