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Part Number: PE95420
Description: The PE95420 is an RF SPDT (single pole double throw) switch and is available in a hermetically sealed ...
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PE95420
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General Description
PE95420 General Description
The PE95420 is an RF SPDT (single pole double throw) switch and is available in a hermetically sealed ceramic package. The PE95420 is designed to cover a broad range of applications from near DC to 8500 MHz for use in various Hi-Rel industries and applications requiring broadband performance. It uses Peregrine's UltraCMOS™ process and features HaRP™ technology enhancements to deliver high linearity and exceptional harmonics performance. HaRP technology is an innovative feature of the UltraCMOS™ process providing upgraded linearity performance.
The PE95420 is an absorptive/non-reflective switch design which is an ideal termination method for RF elements in a system design. A single-pin 2.2V CMOS logic control in a single chip solution reduces the number of control lines.
PE95420 Maximum Ratings
| Symbol | Parameter/Conditions | Min | Max | Units |
| VDD | Power supply voltage | -0.3 | 4.0 | V |
| VC1 | Voltage on LS input | -0.3 | VDD+ 0.3 |
V |
| VC2 | Voltage on CTRL input | -0.3 | VDD+ 0.3 |
V |
| TST | Storage temperature range | -65 | 150 | |
| VESD | ESD voltage (Human Body Model) |
2000 | V |
Exceeding absolute maximum ratings may cause permanent damage. Operation should be restricted to the limits in the Operating Ranges table. Operation between operating range maximum and absolute maximum for extended periods may reduce reliability.
PE95420 Features
• HaRP™-Technology-Enhanced
• Eliminates Gate and Phase Lag
• No insertion loss or phase drift
• High linearity 60 dBm IIP3
• Low insertion loss:
• 0.8 dB at 100 MHz
• 1.4 dB at 3000 MHz
• 1.5 dB at 6000 MHz
• High isolation
• 65 dB at 100 MHz
• 42 dB at 3000 MHz
• 40 dB at 6000 MHz
• 1 dB compression point of +30 dBm
• Single-pin 3.3 V CMOS logic control
• ESD tolerant to 2000 V HBM
• Absorptive/Non-Reflective
• Offered in a 7-lead Hermetic CSOIC
Surface-Mount Package and in DIE form
• Eliminates Gate and Phase Lag
• No insertion loss or phase drift
• High linearity 60 dBm IIP3
• Low insertion loss:
• 0.8 dB at 100 MHz
• 1.4 dB at 3000 MHz
• 1.5 dB at 6000 MHz
• High isolation
• 65 dB at 100 MHz
• 42 dB at 3000 MHz
• 40 dB at 6000 MHz
• 1 dB compression point of +30 dBm
• Single-pin 3.3 V CMOS logic control
• ESD tolerant to 2000 V HBM
• Absorptive/Non-Reflective
• Offered in a 7-lead Hermetic CSOIC
Surface-Mount Package and in DIE form
PE95420 Connection Diagram
PE90F120
PDF/DataSheet Download
- Datasheet: PE90F120
- File Size: 124188 KB
- Manufacturer: ETC [ETC]
- Click here to Download
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