Purchase PEB2084, In-stock PEB2084 From SeekIC.
MFG:INFINEON Package Cooled:QFP-44 D/C:08+
- Table of contents:
PEB2084
-
Suppliers
DataSheet
General Description
PEB2084 Maximum Ratings
| Parameter |
Symbol |
Limit Values |
Unit |
| Ambient temperature under bias |
TA |
0 to 70 |
°C |
| Storage temperature |
Tstg |
65 to 125 |
°C |
| Voltage on any pin with respect to ground |
VS |
0.4 to VDD + 0.4 |
V |
| Maximum voltage on any pin |
Vmax |
6 |
V |
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
PEB2084 Features
• Four full duplex (B1 + B2 + D) S/T interface transceivers, each equipped with the following functions:
Analog S/T interfaces fully according to the CCITT I.430, ETSI 300.012 and ANSI T1.605 standards.
192 kbit/s transmission rate
Receive timing recovery
Conversion between pseudo-ternary and binary codes
Conversion between S/T and IOM-2 frame structures
Activation / deactivation procedures, triggered by primitives received over the IOM-2 interface or by info received from the line (e.g. detection of INFO1)
Access to S and Q bits of S/T interface
Execution of test loops
Loop length up to 1.5 km (point-to-point)
Frame alignment in trunk applications with maximum wander of ± 50 ms
Logical S/T interface functions identical to PEB 2081, SBCX, for line card applications.
Analog S/T line transceivers identical to PEB 2081, SBCX.
• IOM-2 interface
• D-channel access control
• Support for JTAG boundary scan test
• 1m CMOS technology with low power consumption
• + 5 V power supply
• P-MQFP-44 package
Analog S/T interfaces fully according to the CCITT I.430, ETSI 300.012 and ANSI T1.605 standards.
192 kbit/s transmission rate
Receive timing recovery
Conversion between pseudo-ternary and binary codes
Conversion between S/T and IOM-2 frame structures
Activation / deactivation procedures, triggered by primitives received over the IOM-2 interface or by info received from the line (e.g. detection of INFO1)
Access to S and Q bits of S/T interface
Execution of test loops
Loop length up to 1.5 km (point-to-point)
Frame alignment in trunk applications with maximum wander of ± 50 ms
Logical S/T interface functions identical to PEB 2081, SBCX, for line card applications.
Analog S/T line transceivers identical to PEB 2081, SBCX.
• IOM-2 interface
• D-channel access control
• Support for JTAG boundary scan test
• 1m CMOS technology with low power consumption
• + 5 V power supply
• P-MQFP-44 package
PEB2084 Connection Diagram
PEB2084
PDF/DataSheet Download
- Datasheet: PEB2084
- File Size: 1298100 KB
- Manufacturer: SIEMENS [Siemens Semiconductor Group]
- Click here to Download
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