PLL1706DBQ

The PLL1706DBQ is one member of the PLL1706 series.The PLL1706 is low cost, phase-locked loop (PLL) multiclock generator.The PLL1706 can generate four system clocks from a 27-MHz reference input frequency. The clock outputs of the PLL1706 can be controlled through serial-mode control pins.The device gives customers both cost and space savings by eliminating external components and enables customers to achieve the very low-jitter performance needed for high performance audio DACs and/or ADCs.The PLL1706 is ideal for MPEG-2 applications which use a 27-MHz master clock such as DVD players, DVD add-on cards for multimedia PCs, digital HDTV systems, and set-top boxes.

Features of the PLL1706DBQ are:(1)27-MHz master clock input; (2)zero PPM Error Output Clocks; (3)Low Clock Jitter: 50 ps (typical); (4)multiple sampling frequencies:fs = 32, 44.1,48,64,88.2,96 kHz; (5)3.3-V single power supply; (6)PLL1706: serial control; (7)package: 20-Pin SSOP (150 mil), lead-free product.This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with appropriate precautions.Failure to observe proper handling and installation procedures can cause damage.

The absolute maximum ratings of the PLL1706DBQ can be summarized as:(1)supply voltage:4 V;(2)supply voltage differences:±0.1 V;(3)ground voltage differences:±0.1 V;(4)storage temperature:-55 to 150;(5)lead temperature:260;(6)input current (any pins except supplies):±10 mA.Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and  functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.The built-in functions of the PLL1706 are controlled through a 16-bit program register. This register is loaded using MD,MC and ML. After the 16 data bits are clocked in using the rising edge of MC, ML is used to latch the data into the register.TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI's standard warranty.Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty. Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.