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MFG:Mini-Circuits  Package Cooled:Limiter  D/C:07+  

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PLS Series Datasheet download

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Part Number: PLS-2

 

MFG: Mini-Circuits

Package Cooled: Limiter

D/C: 07+

 

Urgent Purchase

PLS-2 Maximum Ratings

Operating Temperature........................... .-55°C to 100°C
Storage Temperature ...............................-55°C to 100°C
RF Input Power .........................................100mW
Control Current .........................................10mA

PLS-2 Features

• wideband, 100 to 900 MHz
• very small, phase variation
• hermetic, shielded case

PLS-2 Typical Application

• military, hi-rel applications
• stabilizing generator outputs
• reducing amplitude variations
• providing constant amplitude signals in phase sensitive systems

PLS-2 datasheet

PLS-2
PDF/DataSheet Download

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PLS-2 Relative Products

  • PLS173

    PLS173

    The PLS173 is a two-level logic element consisting of 42 AND gates and 10 OR gates with fusible link connections for programming I/O polarity and direction.All AND gates of PLS173are linked to 12 inputs (I) and 10 bidirectional I/O lines (B). These yield var...

  • PLS168

    PLS168

    The PLS168 is a bipolar, programmable state machine of the Mealy type. PLS168 contains logic AND-OR gate arrays with user programmable connections which control the inputs of on-chip state and output registers. PLS168 consist respectively of 10 Qp, and 4 Of ...

  • PLS167-33

    PLS167-33

    The PLS167-33 is one member of the PLS167 series.The PLS167 is field-programmable replacements for sequential logic. The devices function as Mealy state machines with a registered output. The PLS utilizes the familiar AND/OR PLA logic structure to implement ...

  • PLS159A

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    The PLS159A is a 3-State output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K flip-flops are dynamically convertible to D-type via a "fold-back" inverting buffer and control gate FC. PLS159A features 8 register...

  • PLS157

    PLS157

    The PLS157 is a 3-state output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K flip-flops are dynamically convertible to D-type via a "fold-back" inverting buffer and control gate Fc. PLS157 features 4 registered...

  • PLS155

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    The PLS155 is a 3-state output, registered logic element combining AND/OR gate arrays with clocked J-K flip-flops. These J-K flip-flops are dynamically convertible to D-type via a "fold-back" inverting buffer and control gate Fc. PLS155 features 4 registered...

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