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Part Number: PPC405CR
Description: The PowerPC 405CR (PPC405CR) is a 32-bit RISC embedded controller. High performance, peripheral integr...
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PPC405CR
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General Description
PPC405CR General Description
The PowerPC 405CR (PPC405CR) is a 32-bit RISC embedded controller. High performance, peripheral integration, and low cost make the device ideal for wired communications, network printers, and other computing applications.
This device is an easy upgrade for systems based on PowerPC 403xx embedded processors, while providing a base for custom chip designs.
The controller is powered by a PPC405 embedded core. This core tightly couples a 266 MHz CPU, MMU, instruction and data caches, and debug logic. Finetuning of the core reduces data transfer overhead, minimizes pipeline stalls, and improves performance.
The PPC405CR employs the IBM CoreConnect™ bus architecture. This architecture, as implemented on the PPC405CR, consists of a 64-bit, 133-MHz Processor Local Bus (PLB) and a 32-bit, 66-MHz On-Chip Peripheral Bus (OPB). High-performance peripherals attach to the PLB and less performance-critical peripherals attach to the OPB.
Technology: CMOS SA-12E 0.25 µm (0.18 µm Leff)
Package: 27mm, 316-ball enhanced plastic ball grid array (E-PBGA)
Power (estimated): Typical 0.8W, Maximum 2.0W at 200MHz.
PPC405CR Maximum Ratings
| Characteristic | Symbol | Value | Unit |
| Supply Voltage (Internal Logic) | VDD | 0 to +2.7 | V |
| Supply Voltage (I/O Interface) | OVDD | 0 to +3.6 | V |
| PLL Supply Voltage | AVDD | 0 to +2.7 | V |
| Input Voltage (2.5V CMOS receivers) | VIN | -0.6 to VDD+0.6 | V |
| Input Voltage (3.3V LVTTL receivers) | VIN | -0.6 to OVDD+0.6 | V |
| Input Voltage (5.0V LVTTL receivers) | VIN | 0.6 to OVDD+2.4 | V |
| Storage Temperature Range | TSTG | -55 to +150 | °C |
| Case temperature under bias | TC | -40 to +120 | °C |
PPC405CR Features
• PowerPC® 405 32-bit RISC processor core operating up to 266MHz
- Memory Management Unit
- 16KB instruction and 8KB data caches
- Multiply-Accumulate (MAC) function, including fast multiply unit
- Programmable Timers
• Synchronous DRAM (SDRAM) interface operating up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications
• External Peripheral Bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and external peripherals
- Up to eight devices
- External Mastering supported
• DMA support for external peripherals, internal UART and memory
- Scatter-gather chaining supported
- Four channels
• Programmable Interrupt Controller supports interrupts from a variety of sources
- Supports 7 external and 10 internal interrupts
- Edge triggered or level-sensitive
- Positive or negative active
- Non-critical or critical interrupt to processor core
- Programmable critical interrupt priority ordering
• Two serial ports (16550 compatible UART)
• One IIC interface
• General Purpose I/O (GPIO) available
• Supports JTAG for board level testing
• Internal Processor Local Bus (PLB) runs at SDRAM interface frequency
- Memory Management Unit
- 16KB instruction and 8KB data caches
- Multiply-Accumulate (MAC) function, including fast multiply unit
- Programmable Timers
• Synchronous DRAM (SDRAM) interface operating up to 133MHz
- 32-bit interface for non-ECC applications
- 40-bit interface serves 32 bits of data plus 8 check bits for ECC applications
• External Peripheral Bus
- Flash ROM/Boot ROM interface
- Direct support for 8-, 16-, or 32-bit SRAM and external peripherals
- Up to eight devices
- External Mastering supported
• DMA support for external peripherals, internal UART and memory
- Scatter-gather chaining supported
- Four channels
• Programmable Interrupt Controller supports interrupts from a variety of sources
- Supports 7 external and 10 internal interrupts
- Edge triggered or level-sensitive
- Positive or negative active
- Non-critical or critical interrupt to processor core
- Programmable critical interrupt priority ordering
• Two serial ports (16550 compatible UART)
• One IIC interface
• General Purpose I/O (GPIO) available
• Supports JTAG for board level testing
• Internal Processor Local Bus (PLB) runs at SDRAM interface frequency
PPC405CR
PDF/DataSheet Download
- Datasheet: PPC405CR
- File Size: 457244 KB
- Manufacturer: Applied Micro Circuits Corporation
- Click here to Download
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