PXA270

Features:

`High-performance processor:
-Intel XScale<sup><sub>®</sub></sup> microarchitecture with Intel<sub><sup>®</sup></sub> Wireless MMX™ Technology
-7 Stage pipeline
-32 KB instruction cache
-32 KB data cache
-2 KB "mini" data cache
-Extensive data buffering
`256 Kbytes of internal SRAM for high speed code or data storage preserved during low-power states
`High-speed baseband processor interface (Mobile Scalable Link)
`Rich serial peripheral set:
-AC'97 audio port
-I2S audio port
-USB Client controller
-USB Host controller
-USB On-The-Go controller
-Three high-speed UARTs (two with hardware flow control)
-FIR and SIR infrared communications port
`Hardware debug features - IEEE JTAG interface with boundary scan
`Hardware performance-monitoring features with on-chip trace buffer
`Real-time clock
`Operating-system timers
`LCD Controller
`Universal Subscriber Identity Module interface
`Low power:
-Wireless Intel Speedstep® Technology
-Less than 500 mW typical internal dissipation
-Supply voltage may be reduced to 0.85 V
-Four low-power modes
-Dynamic voltage and frequency management
`High-performance memory controller:
-Four banks of SDRAM: up to 104 MHz @ 2.5V, 3.0V, and 3.3V I/O interface
-Six static chip selects
-Support for PCMCIA and Compact Flash
-Companion chip interface
`Flexible clocking:
-CPU clock from 104 to 624 MHz
-Flexible memory clock ratios
-Frequency changes
-Functional clock gating
`Additional peripherals for system connectivity:
-SD Card / MMC Controller (with SPI mode support)
-Memory Stick card controller
-Three SSP controllers
-Two I2C controllers
-Four pulse-width modulators (PWMs)
-Keypad interface with both direct and matrix keys support
-Most peripheral pins double as GPIOs


Specifications

Symbol	Description	Min	Max	Units
VCC_OL1	Offset voltage between any of the following pins: VCC_CORE	40	125	°C
VCC_OL2	Offset voltage between any of the following pins: VCC_SRAM	0.3	0.3	V
VCC_OH1	Offset voltage between any of the following pins: VCC_MEM	0.3	0.3	V
VCC_OH2	Offset voltage between any of the following pins: VCC_IO	0.3	0.3	V
VCC_OH3	Offset voltage between VCC_LCD<0> and VCC_LCD<1>	0.3	0.3	V
VCC_HV	Voltage applied to high-voltage supply pins (VCC_BB, VCC_USB, VCC_USIM, VCC_MEM, VCC_IO<, VCC_LCD)	0.3	0.3	V
VCC_LV	Voltage applied to low-voltage supply pins (VCC_CORE, VCC_PLL, VCC_SRAM)	VSS0.3	VSS+4.0	V
VIP	Voltage applied to non-supply pins except PXTAL_IN, PXTAL_OUT, TXTAL_IN, and TXTAL_OUT pins	VSS0.3	VSS+1.45	V
VIP_X	Voltage applied to XTAL pins (PXTAL_IN, PXTAL_OUT, TXTAL_IN, TXTAL_OUT)	VSS0.3	VSS+4.0	V
VESD	Maximum ESD stress voltage, three stresses maximum: • Any pin to any supply pin, either polarity, or • Any pin to all non-supply pins together, either polarity	-	2000	V
IEOS	Maximum DC input current (electrical overstress) for any non-supply pin	-	2000	mA

Description

The Intel® PXA270 processor (PXA270 processor) provides industry-leading multimedia performance, low-power capabilities, rich peripheral integration and second generation memory stacking. Designed from the ground up for wireless clients, it incorporates the latest Intel advances in mobile technology over its predecessor, the Intel® PXA255 processor. These same attributes and features also make the PXA270 processor ideal for embedded applications. The PXA270 processor redefines scalability by operating from 104 MHz up to 624 MHz, providing enough performance for the most demanding mobile applications.

The PXA270 processor is the first Intel processor to include Intel® Wireless MMX™ technology, enabling high-performance, low-power multimedia acceleration with a general-purpose instruction set. Intel® Quick Capture technology provides a flexible and powerful camera interface for capturing digital images and video. While performance is key in the PXA270 processor, power consumption is also a critical component. The new capabilities of Wireless Intel SpeedStep® technology set the standard for low-power consumption.

The PXA270 processor is offered in two packages: 13x13 mm VFBGA and 23x23 mm PBGA.