RM7000C

Features: • Dual-Issue symmetric superscalar microprocessor• 600MHz max CPU frequency• Capable of issuing two instructions per clock cycle• Integrated primary and secondary caches• 16KB Instruction, 16KB Data, and 256KB on-chip secondary• All are 4-way set assoc...

product image

RM7000C Picture
SeekIC No. : 004477939 Detail

RM7000C: Features: • Dual-Issue symmetric superscalar microprocessor• 600MHz max CPU frequency• Capable of issuing two instructions per clock cycle• Integrated primary and secondary c...

floor Price/Ceiling Price

Part Number:
RM7000C
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

SeekIC Buyer Protection PLUS - newly updated for 2013!

  • Escrow Protection.
  • Guaranteed refunds.
  • Secure payments.
  • Learn more >>

Month Sales

268 Transactions

Rating

evaluate  (4.8 stars)

Upload time: 2024/4/27

Payment Methods

All payment methods are secure and covered by SeekIC Buyer Protection PLUS.

Notice: When you place an order, your payment is made to SeekIC and not to your seller. SeekIC only pays the seller after confirming you have received your order. We will also never share your payment details with your seller.
Product Details

Description



Features:

• Dual-Issue symmetric superscalar microprocessor
• 600MHz max CPU frequency
• Capable of issuing two instructions per clock cycle
• Integrated primary and secondary caches
• 16KB Instruction, 16KB Data, and 256KB on-chip secondary
• All are 4-way set associative with 32-byte line size
• Per-line locking in primary and secondary caches
• Fast Packet Cache™ increases system efficiency in networking applications
• Integrated external cache controller
• Allows up to 64Mbyte of external cache for applications with large data sets
• Enhanced protocol eliminates requirement for TAG RAMS
• High-performance system interface
• 1600 Mbyte per-second peak throughput
• 200 MHz max. freq., HSTL multiplexed address/data bus (SysAD200)
• Supports two outstanding reads with out-of-order return
• High-performance floating-point unit
• 1200 MFLOPS maximum
• IEEE754 compliant single and double precision floating-point operations
• 64-bit MIPS instruction set architecture
• Data PREFETCH instruction allows the processor to overlap cache miss latency and instruction execution
• Single-cycle floating-point multiplyadd
• Integrated memory management unit
• Fully associative TLB
• 64/48 dual entries map 128/96 pages
• Variable page size
• Embedded application enhancements
• Fourteen fully prioritized vectored interrupts-10 external, 2 internal, 2 software
• Specialized DSP integer Multiply- Accumulate instructions (MAD/MADU), and three-operand Multiply instruction (MUL)
• I and D Test/Break-point (Watch) registers for emulation and debug
• Performance counter for system and software tuning and debug





Application

• Voice Gateways
• Multi-Service Access Platforms
• DSLAMs/Access Concentrators
• Remote Access Switches
• Web Switches
• Layer 3 Switches
• Backbone Switches/Routers
• RAIDs
• Set Top Boxes
• Networked Printers
• Cellular Base Stations





Customers Who Bought This Item Also Bought

Margin,quality,low-cost products with low minimum orders. Secure your online payments with SeekIC Buyer Protection.
Circuit Protection
Optical Inspection Equipment
Cable Assemblies
Soldering, Desoldering, Rework Products
Cables, Wires
Discrete Semiconductor Products
View more