RTL8305SB

The RTL8305SB is a Fast Ethernet switch, which integrates memory, five MACs, and five physical layer transceivers for
10Base-T and 100Base-TX operation into a single chip. All ports support 100Base-FX, which share pins (TX+-/RX+-) with UTP ports and need no SD+/- pins, a development using Realtek proprietary technology. Due to the lack of auto-negotiation in 100Base-FX applications, the RTL8305SB can be forced into half or full duplex mode and can enable or disable flow control in fiber mode.
The five ports are separated into 3 groups (GroupX/GroupY/Port4) for flexible port configuration using strapping pins upon reset. The SetGroup pin is used to select port members in GroupX and GroupY. While the port members is determined, you can use mode selection pin (GxMode/Gymode/P4Mode[1:0]) to select operating interfaces such as 10/100Base-TX, 100Base-FX. Each group has 4 pins to select initial port status (ANEG/Force, 100/10, Full/Half, Enable/Disable Flow Control) upon reset. Upon reset, in addition to using strapping pins, the RTL8305SB also can be configured with an EEPROM or read/write operation by a CPU through the MDC/MDIO interface.
The fifth port (port 4) supports an external MAC interface, which can be set to PHY mode MII, PHY mode SNI, or MAC
mode MII to work with a routing engine, HomePNA or VDSL transceiver. In order to accomplish diagnostics in complex
network systems, the RTL8305SB also provides a loopback feature in each port for a variable CPU system.
The RTL8305SB contains a 1K entry address look-up table and supports a 16 entry CAM to avoid hash collisions and to maintain forwarding performance. The RTL8305SB supports IEEE 802.3x full duplex flow control and back- pressure half duplex flow control. The broadcast storm filtering function is provided to filter unusual broadcast storm issues and has an intelligent switch engine to prevent Head-Of -Line blocking problems.
The RTL8305SB supports 5 groups of VLANs which can be configured with port based VLAN and/or 802.1Q tag VLAN.
ARP broadcast and Leaky VLAN are also supported for advanced applications.
The RTL8305SB supports several types of QoS functions with two level priority queues to improve multi-media or real-time networking applications. The QoS functions are based on: 1) Port based priority; 2) 802.1Q VLAN priority tag; 3) The TOS/DS (DiffServ) field of TCP/IP. In order to avoid the flow control function effecting the quality of high priority frames, the RTL8305SB supports an intelligent flow control for high priority frames by setting DisFCAutoOff to automatically turn off flow control for 1~2 seconds whenever the congestion port receives high priority frames. When the QoS function is enabled, a VLAN tag can be inserted or removed at the output port. The RTL8305SB will insert a VLAN priority-tag (VID=0x000) for untagged frames or remove the tag for all tagged frames.
Maximum packet length can be 1536 or 1552 bytes according to the initial configuration (strapping upon reset). The filtering function is supported for the 802.1D specified reserved group MAC addresses (01-80-C2-00-00-03 to 01-80-C2-00-00-0F).
The RTL8305B provides flexible LED functions for diagnostics, which include: 1) Four combinations of link, activity, speed, duplex and collision which are designed for convenient LED displays, such as bi-color LEDs; 2) Reset blinking; 3) Blinking time selection. The RTL8305SB also provides a loop detection function and alarm, for network existence notification, with an output pin which can be designed as a visual LED or a status input pin for a CPU.
The RTL8305SB implements a power saving mode on a per port basis. One port automatically enters power saving mode 10 seconds after the cable is disconnected from it. The RTL8305SB also implements a power down mode on a per port basis.
Users can set MII Reg.0.11 to force the corresponding port to enter the power down mode, which disables all transmit/receive functions, except SMI (MDC/MDIO management interface).
Each physical layer channel of the RTL8305SB consists of a 4B5B encoder/decoder, a Manchester encoder/decoder, a
scrambler/descrambler, a transmit output driver, output wave shaping filters, a digital adaptive equalizer, a PLL circuit and a DC restoration circuit for clock/data recovery. Friendly crossover auto detection and correction functions are also supported for easy cable connection.
The integrated chip benefits from low power consumption, advanced functions with flexible configurations for 5-port SOHO switch, Home Gateway, xDSL/Cable router, and other IA applications.