RTSX32SU

Features: • Very Low Power Consumption (Up to 68 mW atStandby)• 3.3V and 5V Mixed Voltage• Configurable I/O Support for 3.3V/5V PCI, LVTTL,TTL, and CMOS 5V Input Tolerance and 5V Drive Strength Slow Slew Rate Option Configurable Weak Resistor Pull-Up/Down forTristated Outputs at ...

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SeekIC No. : 004480159 Detail

RTSX32SU: Features: • Very Low Power Consumption (Up to 68 mW atStandby)• 3.3V and 5V Mixed Voltage• Configurable I/O Support for 3.3V/5V PCI, LVTTL,TTL, and CMOS 5V Input Tolerance and 5V D...

floor Price/Ceiling Price

Part Number:
RTSX32SU
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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268 Transactions

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Upload time: 2024/4/27

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Product Details

Description



Features:

• Very Low Power Consumption (Up to 68 mW at
Standby)
• 3.3V and 5V Mixed Voltage
• Configurable I/O Support for 3.3V/5V PCI, LVTTL,
TTL, and CMOS
5V Input Tolerance and 5V Drive Strength
Slow Slew Rate Option
Configurable Weak Resistor Pull-Up/Down for
Tristated Outputs at Power-Up
Hot-Swap Compliant with Cold-Sparing
Support
• Secure Programming Technology Prevents Reverse
Engineering and Design Theft
• 100% Circuit Resource Utilization with 100% Pin
Locking
• Unique In-System Diagnostic and Verification
Capability with Silicon Explorer II
• Low-Cost Prototyping Option
• Deterministic, User-Controllable Timing
• JTAG Boundary Scan Testing in Compliance with
IEEE Standard 1149.1 Dedicated JTAG Reset
(TRST) Pin



Specifications

Symbol Parameter Limits Units
VCCI DC Supply Voltage 0.3 to +6.0 V
VCCA DC Supply Voltage 0.3 to +3.0 V
VI Input Voltage 0.5 to + 6.0 V
VI Input Voltage for Bidirectional I/Os when using
3.3V PCI
0.5 to +VCCI + 0.5 V
TSTG Storage Temperature 65 to +150



Description

• SEU-Hardened Registers Eliminate the Need to
Implement Triple-Module Redundancy (TMR)
Immune to Single-Event Upsets (SEU) to LETth
> 40 MeV-cm2/mg,
SEU Rate < 1010 Upset/Bit-Day in Worst-Case
Geosynchronous Orbit
• Up to 100 krad (Si) Total Ionizing Dose (TID)
Parametric Performance Supported with Lot-
Specific Test Data
• Single-Event Latch-Up (SEL) Immunity
• TM1019.5 Test Data Available
• QML Certified Devices


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