S5D2501F

Features: • Build in 1K-byte SRAM• 464 ROM fonts (448 standard fonts + 16 Multi-color fonts)• Full Screen Memory Architecture• Wide range PLL available (15 kHz - 120 kHz)• Programmable vertical height of character• Programmable vertical and horizontal positionin...

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S5D2501F Picture
SeekIC No. : 004482648 Detail

S5D2501F: Features: • Build in 1K-byte SRAM• 464 ROM fonts (448 standard fonts + 16 Multi-color fonts)• Full Screen Memory Architecture• Wide range PLL available (15 kHz - 120 kHz)R...

floor Price/Ceiling Price

Part Number:
S5D2501F
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/27

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Product Details

Description



Features:

• Build in 1K-byte SRAM
• 464 ROM fonts (448 standard fonts + 16 Multi-color fonts)
• Full Screen Memory Architecture
• Wide range PLL available (15 kHz - 120 kHz)
• Programmable vertical height of character
• Programmable vertical and horizontal positioning
• Character color selection up to 16 different colors
• Programmable background color (Up to 16 colors)
• Character blinking, bordering and shadowing
• Color blinking
• Character scrolling
• Fade-in and fade-out
• Row to row spacing control
• Window outline and shadowing
• Box drawing
• Character sizing up to four times
• 8 PWM DAC channels with 8-bit resolution
• 96 MHz pixel frequency from on-chip PLL
• I2C Protocol Data Transmission (Slave Address : BAH)
• OSD Vertical Bouncing Auto Detect / Correction
• Back Raster Blanking (Row Control)



Pinout

  Connection Diagram


Specifications

Parameters
Symbol
Value
Unit
Min.
Typ.
Max.
Maximum Supply Voltage
VDD
-
-
6.5
V
Input Voltage
VI
-
-
5.25
V
Operating Temperature Range
TOPR
-20
-
70
°C
Storage Temperature Range
TSTG
-40
-
125
°C
Power Dissipation
PD
-
-
1200
mW



Description

According to the I2C protocol, the S5D2501F receives the data from a micro controller. The SDA line and the SCL line are shown in Figure 4. As shown in Figure 4, after the starting pulse, the slave address with R/W* bit and an acknowledge are transmitted in sequence, an internal register address of the S5D2501F is followed. The first 8-bit byte is the upper 8bits of the register address. The lower 8bits of the register address are followed after the second acknowledge. There is a data transmission format and are two address bit patterns in the S5D2501F as following. The slave address of the S5D2501F is BAH(in hexadecimal).




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